JPS58164005A - Regenerating device of audio signal - Google Patents

Abstract

PURPOSE:To record and reproduce with a high quality, by checking an error of a regenerated PCM signal, and correcting a block of its PCM signal when said error exceeds a prescribed value. CONSTITUTION:From an amplifier 21, a signal Sc is fetched continuously by 1 block each at every period T1, and whenever this signal Sc has an error, a flag Pe is set in an error checking circuit 24. The error flag Pe is supplied to a counter 51, and the counter 51 counts an error at every block of the signal Sc at every period T1. A count value of the counter 51 is supplied to a decoder 52, and when its cunt value exceeds a prescibed value, a detecting signal Pd is generated, access control of memory circuits 23A, 23B is executed to a decoder 22, and an error correction by replacement of a block is executed. Also, an impulsive noise of the joint is eliminated by adding a digital correcting signal Sn to a PCM signal Sp.

Description

DETAILED DESCRIPTION OF THE INVENTION When recording and reproducing audio signals, if the audio signals are converted into PCM, high-quality recording and reproducing can be achieved.

FIGS. 1 and 2 show an example of a recording system and a reproducing system of such a PCM tape recorder.

That is, in the recording system shown in FIG.
a is supplied to the A/D converter 0 through the input terminal 0η, and as shown in FIG. The signal Sp is alternately written to the memory circuits (14A) and (14B) through the recording encoder a3 as shown in FIG. The signal Sp is read out alternately every period TI at approximately twice the writing speed.

In addition, in FIG. 5, the period T a + Tb is 1/6
Unit period alternately located every 0 seconds, period T(1+T1
are the first and second half periods when the periods Ta and Tb are divided into two equal parts.

Therefore, from encoder α→, as shown in the fifth diagram, the time axis is compressed to ho lA, and P located in period T1
A CM signal Sc is extracted. That is, each block of the signal Sc has audio information for 1/60 seconds, and is a PCM signal whose time axis is specifically compressed and located in the period TI.

~Also, at this time, an error correction modified code forming circuit 0→ is connected to the encoder a→, and processing for error correction and error modification is performed for each block of the signal Se. For example, Interleaving is performed within one block of the signal Sa, and CRC and integrity bits are added every three words. The arriving signal Sc has a run-in at the beginning of each block.

Note that in FIG. 5, the period τθ is the time required to perform the above encoding. The above circuit (6)
The processing by ~0→ is performed in synchronization with the clock and control signals from the clock forming circuit (g).

This signal Sc is then supplied to the rotating magnetic heads CIA) and (IB) through the recording amplifier 0→.

The heads (IA) and (IB) have an angular spacing of 1800 degrees from each other as shown in FIG.
The tape (2) is rotated in the direction of H), and the magnetic tee (2) is passed diagonally around the rotating circumference over an angular range of just over 90°, and the tape (2) is rotated by a capstan and a pinch roller (not shown). (6T) makes it run at a constant speed in the direction of arrow (6T).

Further, the rotations of the heads (IA) and (IB) are synchronized with the period Ta)Tb by servo control. That is, from the formation circuit (G), for example, as shown in FIG.
The pulse Pr is taken out, and this pulse Pr is the sir? circuit 0
1), and a pulse generating means 0→ is provided on the rotating shaft (3) of the heads (IA), (IB) to generate one pulse per rotation of the heads (IA), (IB). is taken out, this quantity is supplied to the servo circuit 0]), and the servo? The output of the circuit 01) is supplied to the motor (4), and the head (IA) is moved so that the head (LA) is at the entry point of the chi 7° (2) at the time of the pulse Pr, as shown in FIG. , (IB) are controlled.

Therefore, during period Tl of period Ta, the head (IA)
Since the head (IB) scans the chip f(2) during the period Tl of the period Tb, the signal SC is applied as shown in FIG. It is recorded sequentially as a magnetic track (3).

Also, the signal Pr from the control circuit side) is connected to the recording amplifier (
41 to the magnetic head 04, and as shown in FIG. 4, it is recorded on the edge of the tape (2) as a track (3C) for control nocels during reproduction.

As described above, in the recording system of FIG. 1, the audio signal Sa is recorded in PCM.

On the other hand, in the playback system shown in Fig. 2, head 0 reproduces No. 9 Lus Pr from track (3C) of tape (2), and this Thousand Lus Pr is the server? The heads (IA), (, IB) are servo-controlled to scan the track (3) in the same relationship as during recording. In this way, the signals SC from the heads (IA) and (IB)
is extracted every period T1 as shown in FIG. 5 Ii'VC.

Then, this signal Sc is supplied to the reproducing decoder (c) through the reproducing amplifier Q°C and the original PCM signal 5p-t)
1 is demodulated. That is, when the signal SC supplied to the decoder Q is written into the memory circuits (23A) and (23B) alternately for each block as shown in FIG. 5G, (5) both of them are shown in FIG. 5H. As such, the write signal Sc
are read out alternately at the writing speed during recording, and therefore, the fCPCM signal Sp is continuously extracted from the decoder (a), expanded to the original time axis as shown in FIG. 5.

Also, at this time, an error check circuit (c) is connected to the decoder (a), and error checking is performed from the CRC and motherboard pit, etc., and error correction and correction are performed based on the results of this check. .

Note that in FIG. 5, the period τd is the time required to perform the above decoding.

This signal Sp is then supplied to the D/A converter (c) and converted into the original audio signal Sm, and this signal Sm is taken out to the output terminal (b).

Note that during this playback, the signal 8e from the amplifier Q■ is
The bit-synchronized clock and control signals are supplied to the clock forming circuit) to form the circuits (c) to (c).
At this time, the pulse Pr from the head (6) is supplied to the forming circuit (g) as a signal indicating the start time of period TI in period Ta.

(6) As described above, in the tape recorder of FIGS. 1 and 2, the audio signal S& is converted into PCM and recorded and reproduced, so that high-quality recording and reproduction can be performed.

By the way, in such a tape recorder, during playback, the PCM signal Sc (signal 8p
), and in this case, if error correction or correction is not performed, noise will occur in the reproduced audio signal Sa.

Therefore, the decoder (A) and error correction circuit (C) of the reproduction system (Figure 2) perform error correction and error correction.
There are methods such as next-order interpolation and previous value hold. Average value interpolation and cubic interpolation are quite effective methods because their detection limit frequency is high, but they cannot be used when errors occur continuously. In particular, in the above-mentioned tape recorder, since the time axis of the audio signal Sm is compressed to approximately 1A and recorded, the effect of dropout is increased by the amount of compression, which is even more so.

Therefore, for continuous errors, correction (interpolation) is performed by holding the previous value, but since the detection limit frequency of holding the previous value is low, if there are many consecutive errors or If the error length becomes significantly longer, this method becomes less effective and ends up degrading the sound quality.

The present invention is capable of correcting a large error in one block or more of the signal Sc as described above, and
The aim is to make the error correction less noticeable.

Therefore, considering the audio signal Sm, this audio signal 8a is a signal with a relatively large degree of redundancy, and also has a high correlation. For a short period of time, when a part of the audio signal 8a is missing, if the nearby waveform is fitted into the missing part, it will not cause much of a problem in terms of hearing.
It turned out to be a fairly effective error correction method for large errors.

The present invention utilizes these points to perform error correction, and also performs the correction more completely.

Let's explain one example below.

In FIG. 6, as shown in FIG. 7A, the signal 8c is continuously taken out from an f (c) one block at a time in each period T1, but in the following explanation and in FIG. Assign a symbol ■~C to . Further, in FIG. 7, it is assumed that many errors have occurred in the block (2) marked with an X, and error correction and correction cannot be performed.

In the error check circuit (c), as shown in FIG. 7B, a flag Pa indicating this is set every time there is an error in the signal go, so this error flag Pa is supplied to the counter (51). At the same time, as shown in FIG.
The pulse Ps at each starting point is taken out, and this pulse P@ is supplied to the counter (51) as a reset signal. Therefore, the counter (51) has a period T.

Errors for each block of the signal SC will be counted.

Then, when the count value N51 of the counter (51) is supplied to the detection circuit (decoder
) In the case of Figure 7, there are many errors in the block, so
As shown in the figure, at a certain point within the period in which block ■ is located, the counter (51) is reset to K°゛0. The returning detection signal Pd is taken out.

This signal Pd is then supplied to the decoder as a control signal for accessing the memory circuits (23A) and (23B), and writing and reading of the memory circuits (23A) and (23B) are performed as shown in FIG. It is controlled as shown in F.

That is, as shown in FIG. 7E, since pd=''0'' up to block 1, the memory circuit (2aA).

(23B) are written alternately block by block.

However, during the period of block (2), since Pd="1", the next block (2) is written into the memory circuit (23A) into which the block was written. And block■
From then on, Pd=″′0″, so! Locks ① to [phase] are again written alternately to the memory circuits (2aA) and (23B).

Then, in response to such writing, as shown in FIG. It is read out twice, and
Block ■ is not read.

Therefore, from the decoder (A), as shown in FIG. 7 G4C, the PCM with block ■ replaced in place of block ■
A signal sp is taken out. In other words, block (2), which had many errors and could not be corrected or repaired, was supplemented by block (2).

This PCM signal Sp is then supplied to a D/A converter (c) through an adder circuit (c) which will be described later, and the audio signal 8m is harmonized.

Thus, according to the present invention, the audio signal Sa is reproduced from the PCM signal sp, but in this case, especially according to the present invention, there are many errors in the reproduced PCM signal SaK (
, CRC and ) f-ity bits, etc., or error correction alone is not suitable for PCM demodulation, PCM demodulation is performed from the previous PCM signal Sa, so the audio signal is corrected for errors without causing any audible problems. 8m can be obtained.

However, with only the above configuration, when an error is corrected using block (2) instead of block (2), i4 noise will occur at the joint.

That is, FIG. 8A shows the signal Sp (same as FIG. 7G), and FIG. 8B shows the demodulated audio signal Sa.

As is clear from FIG. 8B, the time t+s at the junction between the original block ■ and block ■, which is 9 instead of block ■, and the time t+s at the junction between this substitute block ■ and block ■. At time t2, as a matter of course, the general Ktli shape is not continuous and changes rapidly. Since a sudden change in the waveform is perceived as 9-rus noise, the signal Sa in FIG.
At +t2, pulse noise will be heard.

This invention also addresses these problems.

That is, as shown in FIG. 8B, the signal Sm
1, and the level difference at the joint at time t1 is dl, and the level difference at time t1 is dl. Assuming that the level difference t-d a at the joint in W, as shown in Figure 6, the parable Pd is supplied to the correction circuit (53), and as shown in Figure 8C, %D/hostage is taken. The current level gradually becomes OK from time tlK level d1, remains O for a predetermined period, and [I A
A digital correction signal sn having a level d2 is formed at ts, and this signal Sn is supplied to an adder circuit (c) K and sent to the PC.
It is added to the M signal Sp.

Therefore, when the signal Sp after the addition is supplied to the D/A converter (c) and demodulated into the audio signal 8m, the DC level of the signal Sm changes as shown in FIG. 8C due to the signal Sn. Therefore, the signal gm is 1 as shown in the eighth diagram, that is, at the time t! .

The waveform joints in 1 are continuous.

Therefore, there is no sudden level change at the joint, so that the noise caused by the elbow noise is not audible.

In this way, according to the present invention, only error correction and correction using CRC and measurement bits are suitable for PCM demodulation. Error correction is performed (13), and the joints between the blocks used for interpolation are made continuous, so that noise is not audible and error correction can be performed effectively.

9A and 9B show other examples of the correction signal an.

Note that, like FIG. 8C, this figure also shows waveforms after D/A conversion. Furthermore, in the case of FIG. 9B, the signal Sp is delayed for one unit period or time-divisionally processed at the time of reading.

In the example shown in FIG. 10, the matrix Pd=″′l#
This is the case when the signal Sp itself is corrected to make the joint continuous (therefore, circuits (c) and (5g) are unnecessary).

That is, FIG. 10 shows the waveform of the signal Sm, the Mt line shows the waveform before correction, and the thick line shows the waveform after correction, but in the example of FIG. The area from the last O cross point of block ■ to the first 0497 point of alternative block ■ is at the θ level, and time t! This is a case where the signal Sp is corrected so as to be at the θ level in the same manner before and after.

(14) In the example of FIG. 10B, time 1. This is a case where the signal Sp is corrected at time t1 in the opposite way to time t1 so as to connect the level of the end point of block (2) to the first 0207 point of the next block (2).

Furthermore, in the example shown in FIG. 1C, the level at the end point of block (2) at time tl is held until the next block (2) reaches the same level, and at time t2, the level at time 1. This is a case where the signal Sp is corrected on the contrary.

In the example shown in FIG. 11, fade-out and fade-in are performed at time tl+t2, and the period tl-t
2 is a case in which the level of the signal Sa is made to be lower than the original level.

Further, in the example shown in FIG. 12, the time tl.

This is a case in which the above-described processing is performed on the joint between t2 and the signal Sa is faded out at the center of the period t1 to t3.

Furthermore, in the example shown in FIG. 13, the interpolation is not performed for block (2) instead of block (2). That is,
In the example of FIG. 13A, from the last 0 cross point of block ■! This is the case where the level up to the first O-Cronne point of the lock ■ is set to 0 level. In the example of FIG. This is the case when connected to the starting point of Yoshiflock ■.

In the example of Figure 13 C, the level of the ending point of Zorotsuku ■ is gradually set to O, and then the level of the starting point of block ■ is set. Hold the last peak of
This is a case where the same processing as in FIG. 3B is performed. Furthermore, the first
In the example of FIG. 3E, the block ■ is faded out by 7 at time t1, and the block ■ is faded in from time t2.

Note that when adding the signal Sn, it may be added to the signal Sa as an analog signal.

[Brief explanation of the drawing]

FIGS. 1 to 5 and 7 to 13 are diagrams for explaining this invention, and FIG. 6 is a system of an example of this invention. ) is a reproduction decoder, (23A) and (23B) are memory circuits, (c) is an error check circuit, and (2) is a D/A
The converter (53) is a correction circuit. (17) Tsuka- sweat fi? Ij8%F6-164005 (8) Drop group <= Low ζ) To ζ v) 4 group < = < o: + Q Ro! Procedural amendment December 14, 1981 Patent application No. 46098 2, title of invention Audio signal reproducing device 3, relationship with the person making the amendment Case Patent applicant address 6-chome, Tokyo Parts Co., Ltd. No. 7 No. 35 Name (21
B) Sony Corporation Representative Director Norio Ohga 4, Agent 1-8-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo (
Shingumi Building) Tokyo (03) 343-5821 (Representative)
cello, number of inventions increased by amendment 7, subject of amendment Detailed explanation of invention in specification column 8,
Contents of the amendment (1) In the specification, add the following on a new line after "Dekiru." on page 14, line 3. [Also, during playback, if tape [2] is run faster than during recording, a missing section will occur at signal 8c, but this missing section will be corrected in the same way, so tape (2)
Search playback can be performed by running the . "that's all

Claims (1)

[Claims] When reproducing the audio signal from a recording medium in which the audio signal is converted into one block of PCM signal every predetermined period and recorded, the recording medium has a memory for storing the reproduced PCM signal, Check the error in the PCM signal that has been generated, and if this error exceeds the specified value, select the block of the PCM signal that is causing this error.
An audio signal reproducing device that modifies each block and also modifies the reproduced audio signal so that the waveform of the reproduced audio signal is continuous at the joint between the modified block and the blocks before and after it.