JPH01287887A - Recording and reproducing device - Google Patents

Abstract

PURPOSE:To prevent the superposition of a sector just before a recording start point and the sector to be recorded newly by changing the reading timing fed from a memory based on the phase difference of the reproducing signal and recording signal just before a recording start point and aligning the phases of the reproducing signal and recording signal on a recording medium. CONSTITUTION:The phase difference between a reproducing signal and recording signal just before starting recording by editing is detected by a phase difference detecting circuit 111, a record buffer memory 102 is controlled by a control circuit 110 based thereon and the position of the signal already recorded on a tape at the recording start point and the position of the signal to be recorded from now on are aligned by delaying the timing reading the recording signal by the delay equivalent to the phase difference. The sector just before the recording start point and that newly recorded can thus be made to be not superposed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a recording and reproducing apparatus such as a digital video tape recorder.

Conventional technology Figure 2 shows a conventional digital video tape recorder (V
It is a block diagram showing the composition of TR.

In the figure, 101 is a rask-side recording signal processing circuit that performs sampling, quantization, outer error correction encoding, etc., 102 is a recording buffer memory that performs shuffling, and 103 is a tape-side recording signal that performs inner error correction encoding, etc. Processing circuit, IO2 is parallel-serial conversion circuit, 10
5 is a tape interface circuit that performs modulation/demodulation and switching between recording and reproduction to record and reproduce signals on the tape; 10B is a serial-to-parallel conversion circuit; 107 is a tape side reproduction signal processing circuit that performs decoding of an inner error correction code, etc.;
IO2 is a playback buffer memory that performs deshuffling,
109 is decoding/error correction of outer error correction code-D/
Rusk side reproduction signal processing circuit that performs A conversion etc., 201
1 shows a control circuit that controls the rotational phase of a cylinder motor that rotates a rotating cylinder to which a recording/reproducing head is attached, and the switching timing of recording/reproducing.

The operation of this digital VTR will be explained below.

During recording, the input video signal 121 is sampled and quantized by the rask-side recording signal processing circuit 101, and then encoded into an outer error correction code.
It is written to the recording buffer memo 1J102. In the recording buffer memory 102, the product code is constructed and shuffled by reading data in a different order from that in writing. The recording data read from the recording buffer memory 102 is encoded into an inner error correction code by the tape-side recording signal processing circuit 103, and additional information such as a synchronization signal and an address signal is added thereto. The recording signal 122 obtained in this manner is converted into a serial bit string by the parallel-to-serial conversion circuit 104 and sent to the tape interface circuit 105. Tape interface circuit 10
5, after modulation suitable for magnetic recording is performed, data is recorded on the tape through the recording head in accordance with the control signal 211 sent from the control circuit 201.

On the other hand, during playback, the signals recorded on the tape are converted into electrical signals by the playback head in the tape interface circuit 105, subjected to waveform equalization and clock reproduction, and are serially parallelized in accordance with the control signal 211 from the control circuit 201. It is sent to the conversion circuit 10G. The serial/parallel conversion circuit 10G detects a synchronization signal/address from the sent serial bit string, and sends a reproduction signal 124 to the tape side reproduction signal processing circuit 107. Tape side playback signal processing circuit 107
Then, the inner error correction code is decoded. The data corrected by this inner error correction code is written into the reproduction buffer memory 108. The reproduction buffer memory 108 performs product code construction and deshuffling by reading out data in an order different from that in writing. The data read from the reproduction buffer memory 108 is subjected to outer error correction code decoding and error correction by the rask-side reproduction signal processing circuit 109, and an output video signal 125 is obtained by D1 conversion.

Through the above-described recording and reproduction, the control circuit 201 controls the cylinder motor to rotate the rotary cylinder in a phase synchronized with the input video signal 121 according to the video synchronization signal separated from the input video signal 121, and Recording and reproducing are performed at the correct timing by switching the recording/reproducing head.

At this time, a plurality of tracks are constructed on the tape by helical scanning. An example of the format of one of these tracks is shown in FIG. In the figure, 301 is one track, 302 and 303 are video sectors consisting of a certain number of blocks in which video data is recorded, 3G4, 305.3011i, 307
defines an audio sector consisting of a certain number of blocks in which audio data is recorded as 308, 309, 310.
, 311, 312 represent edit gaps in which no signals are recorded. During recording, the tape-side recording signal processing circuit 103 adds address data representing the position of the recorded data on the screen to a certain number of words of recorded data, and further represents block synchronization timing and word synchronization timing. Adding a sync signal,
Constitutes one block. In this way, the configured blocks are used as one unit for recording and reproducing data, and blocks consisting of video data are recorded in blocks for a certain period of time to create video sectors 302 and 303, and blocks consisting of audio data are similarly recorded. Audio sector 304.305 for a certain period of time.

30[i, 307 is configured. During reproduction, block synchronization and word synchronization are established by detecting a synchronization signal in the serial-parallel conversion circuit 106.

Problems to be Solved by the Invention When performing editing such as inserting and assembling on a digital VTR configured as described above, it is necessary to rewrite the signal already recorded on the tape with new data starting from the video sector 303, for example. In this case, the timing to start recording is determined by the control circuit 201.
Provided in synchronization with the input video signal. At this time, a positional shift occurs between the already recorded video sector and the newly recorded video sector due to mechanical errors in the tape running system or the like. Therefore, between each sector, there are parts 308, 309, 310, 311, 312 where signals are not recorded, called edit gaps.
The sector immediately before the sector in which the newly recorded signal has already been recorded and is to be rewritten (i.e.,
In the above example, it is made so that it does not overlap with the audio sector 307). However, in order to perform high-density recording, it is desirable that the edit gap where no signal is recorded be as short as possible. Therefore, the tape running system and rotating cylinder drive system themselves have sufficiently high precision, and at the same time, even when editing tapes recorded on different VTRs, the position of the signal on the tape is smaller than the edit gap. Since it also has to be small, it has had the problem of requiring a highly precise mechanical device.

In view of this, the present invention has been developed to use a tape running system with lower mechanical precision to rewrite the tape recorded on a different VTR when editing the tape recorded on a different VTR than the one used for recording. The part immediately before the part where
The purpose is to prevent the signal parts to be recorded from overlapping.

Means for Solving the Problems The present invention temporarily stores and writes a certain amount of input signals when inserting or adding new signals to a medium on which signals have already been recorded. A memory that reads signals stored in a different order from the time, a phase difference detection circuit that compares the phase of the playback signal from the playback head and the phase of the recording signal to be recorded by editing, and the phase difference detection circuit that reads out the signals stored in a different order. and a control circuit that controls the readout timing of the recorded signal from the memory according to the phase difference between the recording signals and the readout timing from the memory based on the phase difference between the reproduction signal and the recording signal immediately before a recording start point. This is a recording and reproducing apparatus configured to match the phases of a reproduced signal and a recorded signal on a recording medium.

According to the above-described configuration, the present invention uses a phase difference detection circuit to detect the phase difference between the reproduction signal and the recording signal immediately before recording is to be started by editing, and based on this, the control circuit detects the phase difference between the reproduction signal and the recording signal. By controlling and delaying the timing of reading the recording signal by a delay amount corresponding to the phase difference, the position of the signal already recorded on the tape at the recording start point and the position of the signal to be recorded from now on are aligned. be able to.

Embodiment FIG. 1 is a block diagram showing the configuration of a digital VTR in an embodiment of the present invention.

In the figure, 110 is a control circuit that controls the rotational phase of a cylinder motor that rotates a rotary cylinder to which a recording/reproducing head is attached, the recording/reproducing switching timing, and the reading timing of the recording buffer memory 102, and 111 is a control circuit that controls the recording signal and reproducing timing. A phase difference detection circuit that detects a phase difference between signals is shown. Note that the same parts as in FIG. 2 are given the same numbers and individual explanations will be omitted.

Next, the operation of the digital VTR of this embodiment will be explained below. During recording, the input video signal is sampled and quantized by the rask-side recording signal processing circuit 101, then encoded into an outer error correction code and written into the recording buffer memory 102. The recording buffer memory 102 constructs and shuffles the product code by reading data in an order different from that in writing. The recording data read from the recording buffer memory 102 is sent to the tape side recording signal processing circuit 103.
The signal is encoded into an inner error correction code, and additional information such as a synchronization signal and an address signal are added. The recording signal 122 obtained in this manner is converted into a serial bit string by the parallel-to-serial conversion circuit 104. The tape interface circuit 105 modulates the control signal sent from the control circuit 110! 23, the data is recorded on the tape through the recording head.

On the other hand, during playback, the signals recorded on the tape are converted into electrical signals by the playback head in the tape interface circuit 105, subjected to clock reproduction and demodulation, and then sent to the serial-to-parallel converter circuit 10B to generate a synchronization signal added on the recording side. Detects a signal and converts a serial bit string into a parallel word string. The reproduced signal 124 obtained in this way is
The tape-side reproduction signal processing circuit 107 decodes the inner error correction code. The data corrected by this inner error correction code is stored in the reproduction buffer memory lO
8 is written. The reproduction buffer memory 108 performs reconstruction and deshuffling of the product code by reading the data in a different order from the order in which it was written. The data read from the reproduction buffer memory 108 is subjected to outer error correction code decoding and error correction by the rask-side reproduction signal processing circuit 109, and an output video signal 125 is obtained by D1 conversion.

Through the above-described normal recording and reproduction, the control circuit 110
controls the cylinder motor in accordance with the video synchronization signal separated from the input video signal 121 so as to rotate the rotary cylinder in phase synchronized with the input video signal, and sends a control signal +23 to the tape head interface circuit 105; Recording and reproduction are performed at the correct timing by switching recording and reproduction.

At this time, the signals recorded on the tape are similar to those shown in FIG.

When performing editing such as inserting and assembling in the digital VTR of this embodiment, first, playback is performed from a point slightly before the designated recording start point. During this time, the serial-parallel converted reproduction signal 1 obtained from the serial-parallel conversion circuit 106
24 and the recording signal 122 obtained from the tape side recording signal processing circuit 103 are applied to the phase difference detection circuit 111, and the phase difference between these two signals is detected. Detection of this phase difference is performed, for example, between the recorded signal 122 and the reproduced signal 122.
This can be done by measuring the timing difference between the synchronization signals included in each using a counter. Next, the control circuit 110 decodes the phase difference signal 127 between the recorded signal 122 and the reproduced signal 124 obtained by the phase difference detection circuit I11, thereby comparing the signal already recorded on the tape with the newly recorded signal. The amount of delay necessary to eliminate the positional deviation between the target signal and the intended signal is determined, and the read timing control signal 12B is sent to the recording buffer memory 102. This allows the recording buffer memo U1
02, and the tape side recording signal processing circuit 103
, the signal recorded on the tape through the parallel-to-serial conversion circuit 104 and the tape interface circuit 105 becomes a signal whose phase matches that of the signal already recorded on the tape.

After determining the recording data read timing from the recording buffer memory 102 as described above, the control circuit 110
A control signal 123 from the tape interface circuit 105 is switched to record a new signal.

By doing this, for example, the video sector 303
When rewriting a new signal from the audio sector 307, the new signal can be recorded in the same position as the already recorded video sector 303.
The edit gap 312 between the two can be made small in terms of format.

As explained above, in this embodiment, different VTRs
When editing a tape recorded on a VTR using a different VTR than the one used for recording, the accuracy of the tape running system may be insufficient and an error may occur between the sectors of the signal that has already been recorded and the sector of the signal that will be recorded. By changing the reading timing of the recording signal by an amount corresponding to this error, it is possible to prevent the sector immediately before the recording start point from overlapping the newly recorded sector.

Effects of the Invention As described above, according to the present invention, when editing a tape recorded on a different VTR using a different VTR than the one used for recording, even if the accuracy of the tape running system is not sufficient, the tape that has already been recorded can be edited. By reading the recording signal from the buffer memory according to the position on the tape of the signal that has already been recorded, it is possible to prevent the part of the signal that has already been recorded immediately before the recording start point from overlapping the part of the signal that will be recorded from now on. Can be done

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a playback system in a digital VTR which is an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a conventional digital VTR, and FIG. 3 is a format diagram showing an example of a tape format. It is. +03. ,,Record buffer memo 1c 110. ,,control circuit,Ill,,phase difference detection circuit, +22. ,
, recording signal, +24. ,,playback signal. Name of agent: Patent attorney Toshio Nakao Figure 3

Claims (1)

[Claims] When editing a medium on which signals have already been recorded by inserting or adding new signals, a certain amount of input signals are temporarily stored and the stored signals are read out in a different order than when they were written. a memory, a phase difference detection circuit that compares the phase of the reproduction signal from the reproduction head and the phase of the recording signal to be recorded by editing, and the recording from the memory according to the phase difference obtained by the phase difference detection circuit. a control circuit that controls signal readout timing, and changes the readout timing from the memory based on the phase difference between the reproduction signal and the recording signal immediately before a recording start point. A recording/reproducing apparatus characterized in that the reproduction signal and the recording signal are matched in phase.