JPS58162085A - Protecting circuit - Google Patents

Protecting circuit

Info

Publication number
JPS58162085A
JPS58162085A JP57045017A JP4501782A JPS58162085A JP S58162085 A JPS58162085 A JP S58162085A JP 57045017 A JP57045017 A JP 57045017A JP 4501782 A JP4501782 A JP 4501782A JP S58162085 A JPS58162085 A JP S58162085A
Authority
JP
Japan
Prior art keywords
voltage
diode
zener
zener diode
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57045017A
Other languages
Japanese (ja)
Inventor
Shoichi Inatomi
稲富 正一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57045017A priority Critical patent/JPS58162085A/en
Publication of JPS58162085A publication Critical patent/JPS58162085A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/068Stabilisation of laser output parameters
    • H01S5/06825Protecting the laser, e.g. during switch-on/off, detection of malfunctioning or degradation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To effectively prevent the damage of an element to be protected and the deterioration of the characteristics by equivalently reducing the response delay of a Zener diode, thereby rapidly absorbing the abnormal voltage. CONSTITUTION:When an input voltage V1 rises reversely to a Zener diode ZD, the operating point of the diode ZD enters a Zener range, and a diode D1 becomes ON. Thus, the output voltage V2 which is presented at the output terminals 2, 2 is clamped to the voltage added by the Zener voltage VZ of the diode ZD and the forward voltage VAK between the anode and the cathode of the diode D1. When the input voltage V1 rises forwardly to the diode ZD, the diode ZD becomes ON, and a diode D2 becomes ON. In this manner, the output voltage V2 is clamped to the voltage added with the forward voltage VAK, VAK between the anode and the cathode of the diodes ZD and D2. Consequently, even if an abnormal voltage is applied to the input terminals 1, 1, a voltage not lower than the voltage clamped by a clamping circuit is not outputted to the output terminals 2, 2, thereby preventing the damage of a light emitting element.

Description

【発明の詳細な説明】 本発明はレーザダイオード等発光素子の保護回路に関し
、素子に静電サージ等の異常な電圧が゛印加された場合
の素子の破壊を確実に防止するようにしたものである。
[Detailed Description of the Invention] The present invention relates to a protection circuit for a light emitting element such as a laser diode, and is designed to reliably prevent destruction of the element when an abnormal voltage such as an electrostatic surge is applied to the element. be.

第1図は従来の保護回路を示すものであり、1゜1は入
力端子、2,2は出力端子、R,Zpは入力端子1,1
間に挿入された抵抗およびツェナーダイオード、3は出
力端子2,2間1(接続された発光素子である。
Figure 1 shows a conventional protection circuit, where 1゜1 is an input terminal, 2 and 2 are output terminals, and R and Zp are input terminals 1 and 1.
A resistor and a Zener diode 3 are inserted between the output terminals 2 and 1 (a light emitting element connected between the two).

上記構成において、入力端子1,1に静電サージのよう
な異常電圧が加わると、大刀電圧V1 が異常に高くな
る。ところが、ツェナーダイオードzDの作用により、
第2図に示すようにへカ電圧v1がツェナーダイオード
zDに対して逆方向に上昇しても、出力電圧V2はツェ
ナーダイオードzDのツェナー電圧72以上にはならな
い。また入力電圧v1がツェナーダイオードzDに対し
順方向に上昇しても、出力電圧v2はツェナーダイオー
ドZDのアノード・カソード間の順方向電圧vAK以」
二にはならない。このようにして入力端子1,1に異常
な電圧が印加されても、出力端子2.2にはツェナーダ
イオードZDでクランプされた電圧以上の電圧は現われ
ず、ギ光素子の破壊が防止される。
In the above configuration, when an abnormal voltage such as an electrostatic surge is applied to the input terminals 1, 1, the long sword voltage V1 becomes abnormally high. However, due to the action of Zener diode zD,
As shown in FIG. 2, even if the voltage v1 increases in the opposite direction to the Zener diode zD, the output voltage V2 does not exceed the Zener voltage 72 of the Zener diode zD. Furthermore, even if the input voltage v1 increases in the forward direction with respect to the Zener diode ZD, the output voltage v2 will be higher than the forward voltage vAK between the anode and cathode of the Zener diode ZD.
It won't be two. In this way, even if an abnormal voltage is applied to the input terminals 1 and 1, no voltage higher than the voltage clamped by the Zener diode ZD will appear at the output terminals 2 and 2, thereby preventing destruction of the photoelectric element. .

しかしながら、一般にツェナーダイオードZDにはかな
り大きな値の接合容量が存在し、これか原因で第2図に
td1〜td4で示すような応答遅れが発生する。
However, the Zener diode ZD generally has a fairly large junction capacitance, which may be the cause of response delays as shown at td1 to td4 in FIG. 2.

特に発光素子3としてレーザダイオードのようにツェナ
ーダイオードZDよりも応答の速いものを使用した場合
には、異常電圧が加わった瞬間に、発光素子が保護回路
の応答よりも速く反応してしまい、ツェナーダイオード
ZDが応答するまでの期間、発光素子3に異常電圧がそ
のまま印加され、発光素子3が破壊するとか、特性が劣
化するという問題がある。
In particular, if a laser diode, which has a faster response than the Zener diode ZD, is used as the light emitting element 3, the moment an abnormal voltage is applied, the light emitting element will react faster than the protection circuit, causing the Zener There is a problem that an abnormal voltage is directly applied to the light emitting element 3 until the diode ZD responds, and the light emitting element 3 may be destroyed or its characteristics may deteriorate.

本発明はツェナーダイオードの応答遅れを等測的に減ら
すことにより、このような従来の問題を解決する保護回
路を提供するものである。
The present invention provides a protection circuit that solves these conventional problems by isometrically reducing the response delay of the Zener diode.

以下本発明の一実施例を第3図とともに説明する。An embodiment of the present invention will be described below with reference to FIG.

第3図において、第1図と実質的に同一機能を有するも
のには同一符号を付して説明を省略する。
In FIG. 3, parts having substantially the same functions as those in FIG. 1 are designated by the same reference numerals, and explanations thereof will be omitted.

Dl、D2は逆並列接続したダイオードであり、この並
列回路をツェナーダイオードZDに直列に接続すること
によってクランプ回路を構成している。R1−R3は抵
抗、Cはコイルである。なお、L記ダイオードD1.D
2 はツェナーダイオードZDの接合容量より小さい接
合容量のもので構成されている。
Dl and D2 are diodes connected in antiparallel, and a clamp circuit is constructed by connecting this parallel circuit in series with the Zener diode ZD. R1-R3 are resistors, and C is a coil. Note that the diode D1. D
2 is constructed with a junction capacitance smaller than that of the Zener diode ZD.

上記構成において、入力端子1,1に静電サージのよう
な異常電、圧が加わると、入力電圧■1 が異常に高く
なる。このとき入力電圧■1がツェナーダイオードZD
に対して逆方向に上昇すると、ツェナーダイオードzD
の動作点はツェナー領域に入り、またダイオードD1 
がオンになる。このため出力端子2,2に現われる出力
電圧■2は、第4図に示すようにツェナーダイオードZ
Dのツェナー電圧vZと、ダイオードD1 のアノード
・カソード間順方向電圧vAK とを加え合わせた電圧
とクランプされる。
In the above configuration, when an abnormal voltage or voltage such as an electrostatic surge is applied to the input terminals 1, 1, the input voltage 1 becomes abnormally high. At this time, the input voltage ■1 is the Zener diode ZD
When rising in the opposite direction to zener diode zD
The operating point of is in the Zener region, and the diode D1
is turned on. Therefore, the output voltage 2 appearing at the output terminals 2 and 2 is caused by the Zener diode Z as shown in FIG.
It is clamped to a voltage that is the sum of the Zener voltage vZ of D and the forward voltage vAK between the anode and cathode of the diode D1.

また入力電圧v1 がツェナーダイオードZDに対して
順方向に上昇すると、ツェナーダイオードzDがオンと
なり、ダイオードD2がオンとなる。
Further, when the input voltage v1 increases in the forward direction with respect to the Zener diode ZD, the Zener diode ZD is turned on, and the diode D2 is turned on.

このため出力電圧v2はツェナーダイオードZDとダイ
オードD2の各アノード・カソード間順方向電圧vAK
、vAKを加えた電圧にクランプされる。
Therefore, the output voltage v2 is the forward voltage vAK between the anode and cathode of the Zener diode ZD and the diode D2.
, vAK.

このようにして入力端子1,1に異常な電圧か印加され
ても、出力端子2,2にはクランプ回路でクランプされ
た電圧以上の電圧は出力されず、これによって発光素子
の破壊が防止される。
In this way, even if an abnormal voltage is applied to input terminals 1 and 1, a voltage higher than the voltage clamped by the clamp circuit will not be output to output terminals 2 and 2, thereby preventing destruction of the light emitting element. Ru.

ここで、応答速度に関係する接合容量について、第5図
(a) 、 (b) 、 (c)を用いて説明する。
Here, the junction capacitance related to the response speed will be explained using FIGS. 5(a), (b), and (c).

上記実施例のクランプ回路は第5図(a)で示されるが
、ツェナーダイオードzD1ダイオードD、。
The clamp circuit of the above embodiment is shown in FIG. 5(a), and includes a Zener diode zD1 and a diode D.

D2の各接合容量をC2,CD1.CD2で表わし、こ
れらの接合容量のみの接続関係を示すと第5図(b)の
ようになる。ここで前述のようにダイオードD1.D2
としてツェナーダイオードZDより接合台μの小さいも
のを使用すれば、すなわち、CD1、CD2〈CZとす
れば、第5図(C)で示されるような合成容置CはCz
CDl・CD2となり結果的にCくCZとなる。
Let each junction capacitance of D2 be C2, CD1. Expressed by CD2, the connection relationship of only these junction capacitances is shown in FIG. 5(b). Here, as mentioned above, the diode D1. D2
If a junction board μ smaller than that of the Zener diode ZD is used, that is, if CD1, CD2<CZ, then the composite container C as shown in FIG. 5(C) becomes Cz
CDl and CD2, resulting in C and CZ.

このように上記実施例によれば、等測的にツェナーダイ
オードzDの接合容量を減少させることができるから、
異常電圧か加わった瞬間に、ツェナーダイオードZDが
発光素子3よりも速く反応して異常電圧を確実に吸収し
、ツェナー電圧の応答遅れによる発光素子3の破壊や特
性の劣化を防止することができる。
As described above, according to the above embodiment, it is possible to reduce the junction capacitance of the Zener diode zD in an isometric manner.
At the moment when an abnormal voltage is applied, the Zener diode ZD reacts faster than the light emitting element 3 and reliably absorbs the abnormal voltage, making it possible to prevent destruction of the light emitting element 3 or deterioration of characteristics due to a delay in response of the Zener voltage. .

第4図のv2は実際の測定結果を示すものであり、第2
図のv2と比べると、入力電圧v1がツェナーダイオー
ドzDの逆方向に上昇した時には立上り部分の応答が改
善され、順方向に上昇したときには立上り、立下りの両
方が改善され、特に立下りの応答速度が大幅に改善され
ていることがわかる。
v2 in Fig. 4 shows the actual measurement results, and
Compared to v2 in the figure, when the input voltage v1 rises in the opposite direction of the Zener diode zD, the response in the rising part is improved, and when it rises in the forward direction, both the rise and fall are improved, especially the falling response. It can be seen that the speed has been significantly improved.

ところで、入力端子1,1を高インピーダンスの電圧源
に接続する場合は余り問題にならないが、低インピーダ
ンスの電圧源に接続する場合には、入力端子1,1に印
加される電圧によって、クランプ回路を構成するツェナ
ーダイオードZDやダイオードD1.D2そのものが破
壊されるおそれがある。これを防止するためには、第3
図に示すようにクランプ回路と直列に保護抵抗R1を接
続すれはよい。
By the way, if the input terminals 1, 1 are connected to a high impedance voltage source, this is not a problem, but if the input terminals 1, 1 are connected to a low impedance voltage source, the voltage applied to the input terminals 1, 1 will affect the clamp circuit. Zener diode ZD and diode D1. D2 itself may be destroyed. To prevent this, the third
It is preferable to connect a protective resistor R1 in series with the clamp circuit as shown in the figure.

また、クランプ電圧が発光素子3の順方向電圧よりも低
いと、発光素子3を十分に駆動することができない。こ
れを防止するためには、発光素子3と直列に抵抗R2を
接続し、その値をクランプ電圧が印加された際に発光素
子3に適止な電流が流れるように定めればよい。
Further, if the clamp voltage is lower than the forward voltage of the light emitting element 3, the light emitting element 3 cannot be sufficiently driven. In order to prevent this, a resistor R2 may be connected in series with the light emitting element 3, and its value may be determined so that an appropriate current flows through the light emitting element 3 when the clamp voltage is applied.

また、入力端子1,1に印加された電荷がより多くクラ
ンプ回路を通して放電されるようにするために、発光素
子と直列にコイルCとダンピング栖抗R3の並列回路を
接続し、発光素子3への電流位相を電圧位相に比べて遅
らせることも有効である。
In addition, in order to discharge more of the charge applied to the input terminals 1 and 1 through the clamp circuit, a parallel circuit of a coil C and a damping resistor R3 is connected in series with the light emitting element, It is also effective to delay the current phase compared to the voltage phase.

もちろん、上述の抵抗R4〜R3、コイルL等は必ずし
も必要ではない。またツェナーダイオードZDに直列に
接続されるダイオードも、異常電圧のL昇方向が一方向
である場合にはダイオードDまたけを設ければよい。ま
た発光素子3は、レーザダイオード以外に赤外線発光L
ED等でもよく、要は静電サージに対して耐久力の低い
ものであれば、どのようなものにも応用できる。
Of course, the above-mentioned resistors R4 to R3, coil L, etc. are not necessarily necessary. Further, a diode connected in series with the Zener diode ZD may be provided across the diode D when the direction in which the abnormal voltage increases in L is unidirectional. In addition to the laser diode, the light emitting element 3 also includes an infrared light emitting device.
It may be an ED or the like, but in short, it can be applied to any material as long as it has low durability against electrostatic surges.

以Fのように本発明は被保護素子に並列に、ツェナーダ
イオードとこのツェナーダイオードより接合容量の小さ
いダイオードの直列回路からなるクランプ回路を接続し
たものであるから、上記ダイオードの作用により上記ツ
ェナーダイオードの応答遅れを等節約に減らし、異常電
圧を速やかに吸収して被保護素子の破壊や特性の劣化を
確実に防止することができる。
As described below, in the present invention, a clamp circuit consisting of a series circuit of a Zener diode and a diode with a junction capacitance smaller than that of the Zener diode is connected in parallel to the protected element. It is possible to effectively reduce the response delay of the device, quickly absorb abnormal voltage, and reliably prevent destruction of the protected element and deterioration of its characteristics.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例の回路図、第2図はその動作波形図、第
3図は本発明の一実施例の回路図、第4図はその動作波
形図、第5図(a) l (b) 、 (C)は1−記
実施例の接合容量を説明するための回路図である。 1・・・・・・入力端子、2・・・・・・出力端子、3
・・・・・・発光素子、ZD・・・・・・ツェナーダイ
オード、Dl、D2 ・・・・・・ダイオード、R1−
R3・・・・・・抵抗、C・・・■−コイル。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第2
図 u14 第3図 第 4 図 第5図
Fig. 1 is a circuit diagram of the conventional example, Fig. 2 is its operating waveform diagram, Fig. 3 is a circuit diagram of an embodiment of the present invention, Fig. 4 is its operating waveform diagram, and Fig. 5 (a) l ( b) and (C) are circuit diagrams for explaining the junction capacitance of Example 1-. 1...Input terminal, 2...Output terminal, 3
...Light emitting element, ZD ... Zener diode, Dl, D2 ...Diode, R1-
R3...Resistance, C...■-Coil. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure u14 Figure 3 Figure 4 Figure 5

Claims (6)

【特許請求の範囲】[Claims] (1)被保護素子と並列に、ツェナーダイオードとこの
ツェナーダイオードより接合容量の小さいダイオードと
を直列に接続したクランプ回路を接続し、上記並列回路
の両端に上記被保護素子の駆動電圧を印加するようにし
たことを特徴とする保護回路。
(1) A clamp circuit consisting of a Zener diode and a diode with a junction capacitance smaller than the Zener diode connected in series is connected in parallel with the protected element, and the driving voltage of the protected element is applied to both ends of the parallel circuit. A protection circuit characterized by:
(2)  ダイオードを、2つのダイオードを逆並列接
続したもので構成したことを特徴とする特許請求の範囲
第1項記載の保護回路。
(2) The protection circuit according to claim 1, characterized in that the diode is constituted by two diodes connected in antiparallel.
(3)  被保護素子を、レーザダイオードまたは赤外
線発光LEDで構成したことを特徴とする特許請求の範
囲第1項または第2項記載の保護回路。
(3) The protection circuit according to claim 1 or 2, wherein the protected element is constituted by a laser diode or an infrared light emitting LED.
(4)被保護素子とクランプ回路の並列回路に直列に抵
抗を接続したことを特徴とする特許請求の範囲第1項記
載の保護回路。
(4) The protection circuit according to claim 1, characterized in that a resistor is connected in series to the parallel circuit of the protected element and the clamp circuit.
(5)被保護素子に直列に抵抗を接続したこと特徴とす
る特許請求の範囲第1項記載の保護回路。
(5) The protection circuit according to claim 1, characterized in that a resistor is connected in series with the protected element.
(6)被保護素子と直列にコイルと抵抗の並列回路を接
続したことを特徴とする特許請求の範囲第1項記載の保
護回路。
(6) The protection circuit according to claim 1, characterized in that a parallel circuit of a coil and a resistor is connected in series with the protected element.
JP57045017A 1982-03-19 1982-03-19 Protecting circuit Pending JPS58162085A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57045017A JPS58162085A (en) 1982-03-19 1982-03-19 Protecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57045017A JPS58162085A (en) 1982-03-19 1982-03-19 Protecting circuit

Publications (1)

Publication Number Publication Date
JPS58162085A true JPS58162085A (en) 1983-09-26

Family

ID=12707577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57045017A Pending JPS58162085A (en) 1982-03-19 1982-03-19 Protecting circuit

Country Status (1)

Country Link
JP (1) JPS58162085A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63274035A (en) * 1987-05-06 1988-11-11 Yamatake Honeywell Co Ltd Operation display device of limit switch
JPH07335822A (en) * 1994-06-07 1995-12-22 Nec Corp Surface mount protective circuit components
US6292500B1 (en) 1998-04-23 2001-09-18 Matsushita Electric Industrial Co., Ltd. Semiconductor laser device
US6597019B2 (en) 1997-01-31 2003-07-22 Matsushita Electric Industrial Co., Ltd Semiconductor light-emitting device comprising an electrostatic protection element

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63274035A (en) * 1987-05-06 1988-11-11 Yamatake Honeywell Co Ltd Operation display device of limit switch
JPH07335822A (en) * 1994-06-07 1995-12-22 Nec Corp Surface mount protective circuit components
US6597019B2 (en) 1997-01-31 2003-07-22 Matsushita Electric Industrial Co., Ltd Semiconductor light-emitting device comprising an electrostatic protection element
US6642072B2 (en) 1997-01-31 2003-11-04 Matsushita Electric Industrial Co., Ltd. Light-emitting element, semiconductor light-emitting device, and manufacturing methods therefor
US6292500B1 (en) 1998-04-23 2001-09-18 Matsushita Electric Industrial Co., Ltd. Semiconductor laser device

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