JPS58161346A - Formation of metallic projected electrode - Google Patents
Formation of metallic projected electrodeInfo
- Publication number
- JPS58161346A JPS58161346A JP57043644A JP4364482A JPS58161346A JP S58161346 A JPS58161346 A JP S58161346A JP 57043644 A JP57043644 A JP 57043644A JP 4364482 A JP4364482 A JP 4364482A JP S58161346 A JPS58161346 A JP S58161346A
- Authority
- JP
- Japan
- Prior art keywords
- film
- metal
- plating base
- base metal
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
（１）
本発明は金属突起電極の形成方法、とくにフィルム状感
光性樹脂を用いた選択電気鍍金法による金属突起電極の
形成方法に関するもので、フリップチップのような金属
突起電極を備えた半導体装置等に適用できるものである
。DETAILED DESCRIPTION OF THE INVENTION (1) The present invention relates to a method for forming metal protruding electrodes, particularly a method for forming metal protruding electrodes by selective electroplating using a film-like photosensitive resin. This can be applied to semiconductor devices etc. equipped with protruding electrodes.
ところで、フィルム状感光性樹脂は２５〜７５μｍの厚
さをもち、またフィルム状感光性樹脂を貼り付ける下地
は電気メッキを行う際の陰極として用いるため通常基板
全面に蒸着等によって形成されるので、基板上に作り込
まれたパターンをフィルム状感光性樹脂を通して識別す
る際、コントラスト不足により識別困難となり、メンキ
パターンの位置合せに支障をきたした。By the way, the film-like photosensitive resin has a thickness of 25 to 75 μm, and since the base on which the film-like photosensitive resin is attached is used as a cathode during electroplating, it is usually formed on the entire surface of the substrate by vapor deposition, etc. When identifying the pattern created on the substrate through the film-like photosensitive resin, the lack of contrast made it difficult to identify, which caused problems in aligning the Menki pattern.
本発明は上記に鑑みなされたもので、フィルム状感光性
樹脂を通してのパターン識別を容易ならしめる方法を提
供することを目的とするものである。The present invention was made in view of the above, and an object of the present invention is to provide a method for facilitating pattern identification through a film-like photosensitive resin.
上記方法によれば、バリア膜にチタンＴｉまたはクロム
Ｃｒ等を用い、メッキ下地金属膜に銅Ｃｕまたは金＾Ｕ
等を用いることにより、パターン識別は明（２）
暗の差ではなく色の差により行えるので、メッキパター
ンの位置合せが容易かつ確実に実施できるようになる。According to the above method, titanium Ti or chromium Cr is used for the barrier film, and copper Cu or gold^U is used for the plating base metal film.
By using the above, pattern identification can be performed based on the difference in color rather than the difference between bright (2) and dark, so that alignment of plating patterns can be performed easily and reliably.
そのために本発明では、配線股上の所定位置を開孔した
配線保護膜と、この保護膜上全面にバリア膜とメッキ下
地金属膜とを順次形成した基板に厚膜状感光性樹脂を被
覆し、前記配線保護膜の開孔部に対応する位置の前記厚
膜状感光性樹脂を除去して電気メッキにより前記配線膜
上に前記バリア膜とメッキ下地金属膜を介して金属突起
電極を形成する方法において、
前記バリア膜と前記メッキ下地金属膜の色が異なるよう
に両膜の材料を選定し、前記金属突起電極の形成部の外
縁に対応する前記メッキ下地金属膜を除去して前記バリ
ア膜を露出させたのち前記厚膜状感光性樹脂を覆い、前
記メッキ下地金属膜と前記バリア膜との色の差を利用し
てパターン認識するようにしたことを特徴とする。To this end, in the present invention, a wiring protective film with holes formed at predetermined positions on the wiring crotch, a barrier film and a plating base metal film are sequentially formed on the entire surface of this protective film, and a thick film-like photosensitive resin is coated on the substrate. A method of removing the thick film-like photosensitive resin at positions corresponding to the openings of the wiring protective film and forming metal protruding electrodes on the wiring film by electroplating via the barrier film and the plating base metal film. In this step, the materials of the barrier film and the plating base metal film are selected so that the colors are different from each other, and the plating base metal film corresponding to the outer edge of the forming portion of the metal protrusion electrode is removed to replace the barrier film. After being exposed, the thick photosensitive resin is covered, and the pattern is recognized using the difference in color between the plating base metal film and the barrier film.
第１図〜第８図は本発明に係る金属突起電極の形成方法
の一実施例を工程順に示した断面図であ（３）
る。まず、第１図に示すように、たとえばシリコンから
なる基板１の主面に、たとえば厚さ０．５〜２μｍのア
ルミニウム膜からなる金属配線２を真空蒸着法等によっ
て形成し、次いでたとえば厚さ０．５〜３μｍの窒化シ
リコンからなる配線保護膜３をプラズマＣＶＤ法等によ
って全面に堆積させる。FIGS. 1 to 8 are cross-sectional views (3) showing one embodiment of the method for forming a metal protrusion electrode according to the present invention in the order of steps. First, as shown in FIG. 1, a metal wiring 2 made of an aluminum film having a thickness of 0.5 to 2 μm is formed on the main surface of a substrate 1 made of silicon, for example, by a vacuum evaporation method. A wiring protection film 3 made of silicon nitride with a thickness of 0.5 to 3 μm is deposited over the entire surface by plasma CVD or the like.
次に、第２図に示すように、前記金属配線２の上にあり
、金属突起電極の形成部に対応する位置にある前記配線
保護膜を選択エツチングにより開孔し、開孔部３Ａを形
成する。この選択エツチングには周知のフォトエツチン
グ技術を用いるが、窒化シリコン膜のエツチングにはい
わゆるドライエツチング法を採用する必要がある。Next, as shown in FIG. 2, a hole is formed in the wiring protective film located on the metal wiring 2 at a position corresponding to the formation part of the metal protrusion electrode by selective etching to form an opening 3A. do. Although a well-known photoetching technique is used for this selective etching, it is necessary to use a so-called dry etching method for etching the silicon nitride film.
次いで、第３図に示すように前記開孔部３Ａを含む全面
にたとえば厚さ５００〜５．００ＯＡのチタンＴｉある
いはクロムＣｒからなるバリア金属４と、たとえば厚さ
０．１〜１．５μｍの銅ＣｕまたはＡｕからなる有色の
メッキ下地金属５とを真空蒸着法等により順次形成し、
さらに前記メッキ下地金属５の上（４）
にネガ型液状感光性樹脂（フォトレジスト）６を１〜３
μｍ程度の厚さに塗布する。Next, as shown in FIG. 3, a barrier metal 4 made of titanium Ti or chromium Cr with a thickness of 500 to 5.00 OA and a barrier metal 4 with a thickness of 0.1 to 1.5 μm, for example, is coated on the entire surface including the opening 3A. Colored plating base metal 5 made of copper Cu or Au is sequentially formed by vacuum evaporation method or the like.
Furthermore, 1 to 3 times of negative liquid photosensitive resin (photoresist) 6 is applied on the plating base metal 5 (4).
Apply to a thickness of approximately μm.
その後、前記開孔部３Ａの周縁に形成された前記配線保
護膜の段差によって作られるパターン等を識別してマス
ク合ゼを行い、露光・現像して第４図に示すように前記
開孔部３Ａを含む金属突起電極形成部を除く前記ネガ型
液状フォトレジスト６を除去し、前記メッキ下地金属５
とを露出させる。Thereafter, the patterns formed by the steps of the wiring protective film formed around the periphery of the opening 3A are identified, mask alignment is performed, and exposure and development are performed to form the opening 3A as shown in FIG. The negative liquid photoresist 6 except for the metal protrusion electrode forming portion including 3A is removed, and the plating base metal 5 is removed.
and expose.
次いで、露出した前記メッキ下地金属５をエツチング除
去し、更に残存する前記ネガ型液状レジスト６を剥離し
た後、第５図に示すように、厚さ２５〜７５μｍのフィ
ルム状フォトレジスト７を２．５〜４．０ ｋｇ ／
ｃ−の圧力、９０〜１３０℃の温度で全面に貼り付け、
金属突起電極形成部のみに残された前記メッキ下地金属
５とその周囲に露出した前記バリア金属４との色の差を
利用して前記メッキ下地金属を識別してマスク合せを行
い、露光・現像して第６図に示すように前記フィルム状
フォトレジスト７の金属突起電極形成部に対応する位（
５）
置に開孔部８を形成する。Next, after removing the exposed plating base metal 5 and peeling off the remaining negative liquid resist 6, a film-like photoresist 7 with a thickness of 25 to 75 .mu.m is coated with 2.5 μm as shown in FIG. 5-4.0 kg/
Paste on the entire surface at a pressure of c- and a temperature of 90-130℃,
The plating base metal is identified by using the color difference between the plating base metal 5 left only in the metal protrusion electrode forming part and the barrier metal 4 exposed around it, mask alignment is performed, and exposure and development are performed. Then, as shown in FIG. 6, a portion (
5) Form an opening 8 at the location.
そして、前記バリア金属４を陰極とした電気メツキ法に
より前記開孔部８に露出した前記メッキ下地金属上に金
、銀、銅、ハンダ等の金属突起電極９を所定の厚さに成
長させ、引き続き第７図に示すように前記フィルム状フ
ォトレジスト７を剥離除去する。Then, a protruding metal electrode 9 made of gold, silver, copper, solder, etc. is grown to a predetermined thickness on the plating base metal exposed in the opening 8 by electroplating using the barrier metal 4 as a cathode, Subsequently, as shown in FIG. 7, the film-like photoresist 7 is peeled off.
最後に、露出した前記バリア金属４をエツチング除去す
ることにより、第８図に示す金属突起電極が形成される
。Finally, the exposed barrier metal 4 is removed by etching to form the metal protrusion electrode shown in FIG. 8.
ところで微小な金属突起電極を正確な位置に形成するた
めには下地のパターンに次のパターンを正確に重ねる必
要があるが、この場合下地のパターンを十分に識別でき
ることが不可欠の要素となる。By the way, in order to form minute metal protrusion electrodes in accurate positions, it is necessary to accurately overlap the next pattern on the underlying pattern, but in this case, it is essential to be able to sufficiently identify the underlying pattern.
とくに、メッキ下地金属５を全面に形成した状態では、
全面が単一の色となり、そのパターン識別は下地の比較
的急峻な段差、あるいは凹凸の多少に起因した反射光量
の差すなわち明暗の差を利用することとなる。したがっ
て、メッキ下地金属５の上にフォトレジストを重ねた場
合、このフォ（６）
トレジスト層においても光の吸収、反射、散乱が生ずる
ため、メッキ下地金属５の明暗の差はフォトレジスト層
が厚くなるほど小さくなる。たとえばメ・７キ下地金属
として銅を用いた場合、２５μｍ厚のフィルム状フォト
レジストですでに識別が困難となってくる。In particular, when the plating base metal 5 is formed on the entire surface,
The entire surface is a single color, and the pattern is identified by utilizing the difference in the amount of reflected light, that is, the difference in brightness and darkness, caused by relatively steep steps or irregularities on the base. Therefore, when a photoresist is layered on the plating base metal 5, this photoresist layer also absorbs, reflects, and scatters light, so the difference in brightness of the plating base metal 5 is due to the thick photoresist layer I see, it gets smaller. For example, if copper is used as the base metal for the metal plate, identification becomes difficult even with a 25 μm thick film photoresist.
上記問題を解決する識別方法に色の差を利用する方法が
ある。この方法によれば下地からの反射光の強度が多少
弱いものであっても、色の差が明確でありさえずれば識
別可能となる。There is an identification method that uses color differences to solve the above problem. According to this method, even if the intensity of the reflected light from the base is somewhat weak, it can be identified as long as the color difference is clear and chirps.
本発明は上記した２種のパターン識別方法を組み合せた
ものであり、まずメッキ下地金属５の上ニ液状フォトレ
ジスト６を塗布し、この液状フォトレジストを透して下
地の段差部と平坦部にできる明暗の差を利用してパター
ン識別を行い、マスク合せする。液状フォトレジスト６
は厚さが１〜３μｍ程度であるため下地パターンのコン
トラストは明瞭であり、十分識別できる。次いでこの液
状フォトレジスト６を用いてメッキ下地金属を選択的に
エツチングすると、金属突起電極形成部の（７）
最表面には前記メッキ下地金属５が、他の部分にはバリ
ア金属４が露出する。したがってメッキ下地金属に銅を
用い、バリア金属にクロム等を用いると、金属突起電極
形成部のみが銅色で他の部分が銀白色のパターンとなる
。したがって、５０μｍ程度の厚さのフィルム状フォト
レジスト７を貼り付けた後でも銅色パターンの識別を行
うことにより容易かつ確実なマスク合せが可能となる。The present invention is a combination of the above-mentioned two types of pattern identification methods. First, a liquid photoresist 6 is applied on the plating base metal 5, and the liquid photoresist is passed through the liquid photoresist to the stepped and flat parts of the base. Pattern identification is performed using the differences in brightness and darkness that can be created, and masks are matched. liquid photoresist 6
Since the thickness is about 1 to 3 μm, the contrast of the underlying pattern is clear and can be sufficiently distinguished. Next, when the plating base metal is selectively etched using this liquid photoresist 6, the plating base metal 5 is exposed on the outermost surface of the metal protrusion electrode forming part (7), and the barrier metal 4 is exposed on the other parts. . Therefore, if copper is used as the base metal for plating and chromium or the like is used as the barrier metal, a pattern will be obtained in which only the metal projecting electrode forming part is copper-colored and the other parts are silver-white. Therefore, even after pasting the film photoresist 7 with a thickness of about 50 μm, easy and reliable mask alignment is possible by identifying the copper color pattern.
なお、前記実施例においては、シリコンからなる基板の
上に金属突起電極を形成する方法を述べたが、他の基板
、たとえばガラス・エポキシ基板あるいはポリイミド基
板等樹脂基板や、あるいはアルミナ等を用いたセラミッ
ク基板、またはアルミ等を用いたメタルコア基板等を用
いてよい。In the above embodiments, a method was described in which metal protruding electrodes were formed on a substrate made of silicon, but other substrates such as resin substrates such as glass/epoxy substrates or polyimide substrates, or alumina or the like may also be used. A ceramic substrate or a metal core substrate using aluminum or the like may be used.
また、金属配線、配線保護膜等も前記実施例に限定され
るものではなく、その目的を達成できる如何なる材料、
形成法でも適用できる。Further, the metal wiring, wiring protection film, etc. are not limited to the above embodiments, and any material that can achieve the purpose can be used.
The formation method can also be applied.
さらに、液状フォトレジストもネガ型に限定されず、ポ
ジ型を使用してよい。この際には、パターン合せ用マー
クを適当な位置に設置しておく必要（８）
があるが、金属突起電極のメッキに使用するフィルム状
フォトレジストはネガ型であるため、液状フォトレジス
トとフィルム状フォトレジストの加工は同一のマスクで
実施できる利点がある。Furthermore, the liquid photoresist is not limited to a negative type, and a positive type may be used. In this case, it is necessary to set pattern alignment marks at appropriate positions (8), but since the film photoresist used for plating the metal protrusion electrodes is negative type, the liquid photoresist and film There is an advantage that processing of shaped photoresists can be carried out using the same mask.
また、メッキ下地金属は金属突起電極形成部のみを残し
て他をエツチング除去したが、金属突起電極形成部の周
縁部のみエツチング除去し、金属突起電極形成後に残さ
れた部分をエツチング除去してもよい。In addition, the plating base metal was removed by etching leaving only the metal protrusion electrode forming part, but it was also possible to remove only the peripheral edge of the metal protrusion electrode formation part and etching the remaining part after forming the metal protrusion electrode. good.
以上述べたように本発明では、バリア膜とメッキ下地金
属膜の色が異なるように両膜の材料を選定し、金属突起
電極の形成部の外縁に対応するメッキ下地金属膜を除去
してバリア膜を露出させた後、厚膜状感光性樹脂を覆い
、前記両膜の色の差を利用してパターン認識するように
しているから、メッキパターンの位置合せが容易にしか
も正確に実施できるようになるという効果が得られる。As described above, in the present invention, the materials of the barrier film and the plating base metal film are selected so that the colors are different from each other, and the plating base metal film corresponding to the outer edge of the portion where the metal protrusion electrode is formed is removed to form a barrier film. After exposing the film, a thick photosensitive resin film is covered and the pattern is recognized using the difference in color between the two films, making it easy and accurate to align the plating pattern. You can get the effect of becoming.
第１図乃至第８図は本発明方法による半導体装置製造工
程の一実施例を示す断面図である。
（９）
１・・・基板、２・・・金属配線、３・・・配線保護膜
、３Ａ・・・開孔部、４・・・バリア膜をなすバリア金
属、５・・・メッキ下地金属、６・・・厚膜状感光性樹
脂をなすネガ型液状感光性樹脂、７・・・フィルム状フ
ォトレジスト、９・・・金属突起電極。
代理人弁理士 岡 部 隆
（１０）
第１図
第２図
＠５図
う
第６図
竿７図
第８図1 to 8 are cross-sectional views showing an embodiment of the semiconductor device manufacturing process according to the method of the present invention. (9) 1... Substrate, 2... Metal wiring, 3... Wiring protective film, 3A... Opening part, 4... Barrier metal forming barrier film, 5... Plating base metal , 6... Negative liquid photosensitive resin forming a thick film photosensitive resin, 7... Film photoresist, 9... Metal protruding electrode. Representative Patent Attorney Takashi Okabe (10) Figure 1 Figure 2 @ Figure 5 Figure 6 Figure 7 Figure 8
Claims (1)
膜上全面にバリア膜とメッキ下地金属膜とを順次形成し
た基板に厚膜状感光性樹脂を被覆し、前記配線保護膜の
開孔部に対応する位置の前記厚膜状感光性樹脂を除去し
て電気メッキにより前記配線膜上に前記バリア膜とメッ
キ下地金属膜を介して金属突起電極を形成する方法にお
いて、前記バリア膜と前記メッキ下地金属膜の色が異な
るように両膜の材料を選定し、前記金属突起電極の形成
部の外膜に対応する前記メッキ下地金属膜を除去して前
記バリア膜を露出させたのち前記厚膜状感光性樹脂を覆
い、前記メッキ下地金属膜と前記バリア膜との色の差を
利用してパターン認識するようにしたことを特徴とする
金属突起電極の形成方法。A wiring protective film with holes formed at predetermined positions on the wiring film, and a substrate in which a barrier film and a plating base metal film are sequentially formed on the entire surface of this protective film are coated with a thick photosensitive resin, and the wiring protective film is coated with a thick photosensitive resin. In the method of removing the thick photosensitive resin film at a position corresponding to the opening and forming a metal protruding electrode on the wiring film by electroplating, the barrier film and the plating base metal film are interposed. The materials of both films are selected so that the colors of the plating base metal film and the plating base metal film are different, and the plating base metal film corresponding to the outer film of the forming portion of the metal protrusion electrode is removed to expose the barrier film. A method for forming a metal protrusion electrode, characterized in that the thick photosensitive resin film is covered and the pattern is recognized by utilizing the difference in color between the plating base metal film and the barrier film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57043644A JPS58161346A (en) | 1982-03-18 | 1982-03-18 | Formation of metallic projected electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57043644A JPS58161346A (en) | 1982-03-18 | 1982-03-18 | Formation of metallic projected electrode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58161346A true JPS58161346A (en) | 1983-09-24 |
Family
ID=12669571
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57043644A Pending JPS58161346A (en) | 1982-03-18 | 1982-03-18 | Formation of metallic projected electrode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58161346A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01173784A (en) * | 1987-12-28 | 1989-07-10 | Kyocera Corp | Manufacture of multilayer interconnection board |
| US4948754A (en) * | 1987-09-02 | 1990-08-14 | Nippondenso Co., Ltd. | Method for making a semiconductor device |
| US5108950A (en) * | 1987-11-18 | 1992-04-28 | Casio Computer Co., Ltd. | Method for forming a bump electrode for a semiconductor device |
-
1982
- 1982-03-18 JP JP57043644A patent/JPS58161346A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4948754A (en) * | 1987-09-02 | 1990-08-14 | Nippondenso Co., Ltd. | Method for making a semiconductor device |
| US5108950A (en) * | 1987-11-18 | 1992-04-28 | Casio Computer Co., Ltd. | Method for forming a bump electrode for a semiconductor device |
| JPH01173784A (en) * | 1987-12-28 | 1989-07-10 | Kyocera Corp | Manufacture of multilayer interconnection board |
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