JPS58159005U - Sequencer malfunction detection device - Google Patents

Sequencer malfunction detection device

Info

Publication number
JPS58159005U
JPS58159005U JP5459282U JP5459282U JPS58159005U JP S58159005 U JPS58159005 U JP S58159005U JP 5459282 U JP5459282 U JP 5459282U JP 5459282 U JP5459282 U JP 5459282U JP S58159005 U JPS58159005 U JP S58159005U
Authority
JP
Japan
Prior art keywords
sequencer
detection device
malfunction detection
timer
internal timer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5459282U
Other languages
Japanese (ja)
Other versions
JPH0435922Y2 (en
Inventor
哲 野村
悟 吉田
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP5459282U priority Critical patent/JPS58159005U/en
Publication of JPS58159005U publication Critical patent/JPS58159005U/en
Application granted granted Critical
Publication of JPH0435922Y2 publication Critical patent/JPH0435922Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例であるシーケンサのプログ
ラム回路、出カニニット及びシーケンサ外部のリレーロ
ジック回路を関連づけて示した回路図で、図においてT
I、T2は例えば時限1秒にセットされた内部タイマ、
Tll、T12は例えば時限2秒にセットされた外部タ
イマ、1はシーケンサ、2は異常信号、3は出カニニッ
トである。
Figure 1 is a circuit diagram showing the program circuit, output unit, and relay logic circuit outside the sequencer in relation to each other, which is an embodiment of this invention.
I, T2 are internal timers set to a time limit of 1 second, for example.
For example, Tll and T12 are external timers set to a time limit of 2 seconds, 1 is a sequencer, 2 is an abnormal signal, and 3 is an output unit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] シーケンサの内部タイマと、この内部タイマより大きい
時間をセットした外部タイマとを有し、上記内部タイマ
の動作不良時に外部タイマをタイムアツプさせ、これを
シーケンサめ異常検出信号とする事を特徴とするシーケ
ンサの動作異常検出装置。
A sequencer comprising an internal timer of the sequencer and an external timer set to a time larger than the internal timer, and which causes the external timer to time up when the internal timer malfunctions, and uses this as an abnormality detection signal for the sequencer. Anomaly detection device.
JP5459282U 1982-04-15 1982-04-15 Sequencer malfunction detection device Granted JPS58159005U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5459282U JPS58159005U (en) 1982-04-15 1982-04-15 Sequencer malfunction detection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5459282U JPS58159005U (en) 1982-04-15 1982-04-15 Sequencer malfunction detection device

Publications (2)

Publication Number Publication Date
JPS58159005U true JPS58159005U (en) 1983-10-24
JPH0435922Y2 JPH0435922Y2 (en) 1992-08-25

Family

ID=30065207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5459282U Granted JPS58159005U (en) 1982-04-15 1982-04-15 Sequencer malfunction detection device

Country Status (1)

Country Link
JP (1) JPS58159005U (en)

Also Published As

Publication number Publication date
JPH0435922Y2 (en) 1992-08-25

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