JPS58158564U - Synchronous stabilization circuit - Google Patents

Synchronous stabilization circuit

Info

Publication number
JPS58158564U
JPS58158564U JP5392482U JP5392482U JPS58158564U JP S58158564 U JPS58158564 U JP S58158564U JP 5392482 U JP5392482 U JP 5392482U JP 5392482 U JP5392482 U JP 5392482U JP S58158564 U JPS58158564 U JP S58158564U
Authority
JP
Japan
Prior art keywords
supplied
synchronous
stabilization circuit
counter
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5392482U
Other languages
Japanese (ja)
Other versions
JPH0241976Y2 (en
Inventor
石幡 潔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP5392482U priority Critical patent/JPS58158564U/en
Publication of JPS58158564U publication Critical patent/JPS58158564U/en
Application granted granted Critical
Publication of JPH0241976Y2 publication Critical patent/JPH0241976Y2/ja
Granted legal-status Critical Current

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Landscapes

  • Synchronizing For Television (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は従来の同期回路の一例を示す系統図
、第3図はこの考案による同期安定化回路の一例を示す
系統図である。 1は同期分離回路、11は可変発振器、12゜13はカ
ウンタ、20は制御回路、スイッチSW1は垂直同期パ
ルスPVの入力を制御するスイッチ、SWl、SW2は
連動して切換えられる手動操作用のスイッチ、R1は内
部リセットパルスである。
1 and 2 are system diagrams showing an example of a conventional synchronous circuit, and FIG. 3 is a system diagram showing an example of a synchronous stabilizing circuit according to this invention. 1 is a synchronization separation circuit, 11 is a variable oscillator, 12 and 13 are counters, 20 is a control circuit, switch SW1 is a switch that controls the input of vertical synchronization pulse PV, and SW1 and SW2 are switches for manual operation that are switched in conjunction. , R1 are internal reset pulses.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 同期分離して得た水平同期パルスを可変発振器に供給し
、その発振出力を第1のカウンタに供給して水平ドライ
ブパルスを得、上記発振出力を更に第2のカウンタに供
給して垂直ドライブパルスを得、同期分離して得た垂直
同期パルスを第°2のカウンタにリセットパルスとして
供給すると共に、この垂直同期パルスの入力を禁止する
スイッチを設け、垂直同期の異常時上記スイッチをオン
にするようにした同期安定化回路。
The horizontal synchronization pulse obtained by synchronous separation is supplied to a variable oscillator, the oscillation output thereof is supplied to a first counter to obtain a horizontal drive pulse, and the oscillation output is further supplied to a second counter to obtain a vertical drive pulse. The vertical synchronization pulse obtained by synchronous separation is supplied to the second counter as a reset pulse, and a switch is provided to prohibit the input of this vertical synchronization pulse, and the switch is turned on in the event of an abnormality in vertical synchronization. synchronous stabilization circuit.
JP5392482U 1982-04-14 1982-04-14 Synchronous stabilization circuit Granted JPS58158564U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5392482U JPS58158564U (en) 1982-04-14 1982-04-14 Synchronous stabilization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5392482U JPS58158564U (en) 1982-04-14 1982-04-14 Synchronous stabilization circuit

Publications (2)

Publication Number Publication Date
JPS58158564U true JPS58158564U (en) 1983-10-22
JPH0241976Y2 JPH0241976Y2 (en) 1990-11-08

Family

ID=30064565

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5392482U Granted JPS58158564U (en) 1982-04-14 1982-04-14 Synchronous stabilization circuit

Country Status (1)

Country Link
JP (1) JPS58158564U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53120330A (en) * 1977-03-30 1978-10-20 Nec Corp Synchronous equipment
JPS54154204A (en) * 1978-05-26 1979-12-05 Nec Corp Identifying system for circuit state change
JPS5683180A (en) * 1979-10-13 1981-07-07 Matsushita Electric Ind Co Ltd Synchronizing circuir for television receiver

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53120330A (en) * 1977-03-30 1978-10-20 Nec Corp Synchronous equipment
JPS54154204A (en) * 1978-05-26 1979-12-05 Nec Corp Identifying system for circuit state change
JPS5683180A (en) * 1979-10-13 1981-07-07 Matsushita Electric Ind Co Ltd Synchronizing circuir for television receiver

Also Published As

Publication number Publication date
JPH0241976Y2 (en) 1990-11-08

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