JPS58156987A - Crt display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to an 0RT (cathode ray tube) display device, and such a CR1 display device is suitable for use in personal computers, for example.
computers, radar, and sonar.

It can be used in display devices such as ultrasonic diagnostic equipment, general home television devices, and the like.

[Description of prior art]

A conventional CR1 display device performs rask scanning in synchronization with an input video signal. That is, basic parameters of the system, such as the scanning rate, are predetermined based on the input video signal. In order to actually eliminate distortion on the CRT screen, the deflection operation of the CRT according to these parameters must be performed with accuracy in terms of linearity and dimension precision, and for this reason linearity correction at the expense of power efficiency is required. Complex additional circuitry is required, such as analytical operation with precise current feedback. In addition, a stabilized power supply is used to cope with power supply voltage fluctuations, but if the design is designed to perform normal deflection operation at the lowest input power supply voltage, the difference will be consumed as wasted power at the highest input power supply voltage. . These are especially important for OR of models that use batteries as the device power source.
This is a big problem for T display devices.

[Purpose of the invention]

The present invention has a simple circuit configuration that does not require complicated additional circuits such as linearity correction circuits or special stabilizing power supplies, but the OR7 screen does not distort even when the device power supply voltage fluctuates. Further, it is an object of the present invention to provide an ORT display device 1t that can reduce its power consumption to the minimum necessary level.

[Key points of the invention]

The present invention divides the picture image to be displayed into a large number of pixel data, uses the horizontal and vertical position data of each pixel on the screen as an address, and writes the luminance data of that pixel to the memory circuit K11, while the deflection of the 01st It detects the deflection signal of the circuit, uses this deflection signal as an address to sequentially read out the luminance data of the pixels from the storage circuit, and sends it to the luminance input of the CRT to display the image on the CRT.

Its configuration includes a storage circuit that digitalizes pixel data of a human-powered video signal and stores it at a predetermined address, and a CR
A circuit that supplies a deflection signal to the deflection circuit of T, a detection circuit that detects this deflection signal, and a digital output 1 of the detection circuit.
It is characterized by comprising a control circuit that reads out pixel data from the address of the memory circuit corresponding to No. 1g, and a circuit that converts the pixel data read out by this control circuit into analog and applies it to the brightness control of the ORT.

[Explanation based on examples]

Hereinafter, the present invention will be explained based on the drawings.

FIG. 1 is a circuit diagram of a device according to an embodiment of the present invention.

In the figure, a battery 1 is connected via a power switch 2 and a choke coil 3 to a power line 44Cil for supplying power voltage to the device. 55 is a smoothing capacitor.

The timing controller SFi is a circuit that uses the clock generated by the clock generator 6, divides it, and sends timing signals to each circuit of the device, and has four output terminals 5a, 5b, 5c, and 56. Be prepared. Timing signal lines are respectively sent from the terminal 5a to the amplifier 7, from the terminal 5b to the amplifier 8, from the terminal 5C to the switch circuit 9, and from the terminal 5d.

Output a of amplifier 7, PMP) transistor 11 and NPN)
Each pace of transistor 12 is guided. These transistors 11 and 12 are connected in series between the power supply line 4 and the ground, and the transistor IIK is connected to the diode 13.
and a :ti diode 14 are connected in parallel to the transistor 12 with the power supply line 4 direction being the forward direction. A horizontal deflection coil 16 is connected to the connection point between the transistors 11 and 12 via a capacitor 15, and this horizontal deflection coil 16 is further grounded via a resistor 17. The horizontal deflection coil 16 is a coil for sweeping the 011 screen in the horizontal direction, and includes the above-mentioned amplifier and transistor 11.
12. Diodes 13, 14, capacitor 15, etc. are connected to the deflection coil 16.

A horizontal deflection circuit is configured to supply a flat deflection current.

The resistor 17 is a resistor for detecting the deflection current flowing through the horizontal deflection coil 161C. The voltage at the connection point between this resistor 17 and the deflection coil 16 is applied to the lead layer 18 as a detection output.
leads to the fixed contact 9aK of the switch circuit 9.

Amplifier 8, transistor 19.20. diode 21,
The circuit consisting of the catfish, condenser-t23, -tl@deflection coil u1 and resistor is a vertical deflection circuit having the same configuration as the horizontal deflection circuit, and the vertical deflection coil U is an OR
This is a coil for sweeping the T@ plane in the vertical direction.

As before, the terminal voltage of the resistor is led to the fixed contact 9b of the switch circuit 9 through the lead 1126.

In the switch circuit 9, the movable contact piece 9C is normally the contact point 9aK.
However, while receiving the timing signal from the timing controller 5, the circuit switches to contact the contact 9bK, and the terminal 9d of the movable contact is connected to the input terminal of the MuD converter lO. Connecting.

The AD converter IO is a circuit that converts an analog input signal into a digital output signal in synchronization with the timing signal from the timing controller 5, and outputs a digital output signal in a multi-bit parallel format! Send to the input of the latch circuit section and Y latch circuit section.

The X latch circuit section is a circuit that latches a digital signal corresponding to the horizontal deflection current at the operation timing of the AD converter IO, and the Y latch circuit section is a circuit that latches the digital signal corresponding to the vertical deflection current at the operation timing of the switch circuit 9. This is a circuit that latches based on timing.

Each output of the latch circuit n% is led to one of the multiplexers, respectively, and the output of each multiplexer is led to address signal terminals 31a and 31b of the frame memory 31, respectively.

It is composed of a frame memory 31FiRAM, and is controlled by a read/write controller 32 to take in data from a data signal terminal 31C and send the data to a DMU converter from a data signal terminal 31tl.

In addition to sending control signals to the frame memory 31, the read/write controller 32 also sends control signals to the multiplexer 29.
．． 30, it is also sent to the DM converter 33 to synchronize the timing of these operations.

The output of the DM converter is further connected to the CM converter via a video amplifier 56.
Sent to RT's luminance human power.

On the other hand, the input video signal that gives the image height to be displayed is X%Y, Zg! ! Consists of numbers. The X signal is a signal that specifies the horizontal position of one surface, the X signal is a signal that specifies the vertical position, and the second signal is a signal for brightness modulation. This X%Y.

Each of the two signals is converted into a multi-bit/parallel digital signal in advance by a multi-D converter.

After this, the X signal is sent to the other input of the multiplexer 29 via the X register tone.
% to the other input of the multiplexer (equity) through
No. 201 is connected to frame memory 31 via 2 registers.
data signal terminals 31cK.

Next, the operation of the apparatus constructed as described above will be explained.

First, to outline the operation, this device has input 1. Divide the Noni video signal into a large number of pixel data and set the 0R of each pixel.
Using the horizontal and vertical position data on the Tilii plane as an address, the luminance data of that pixel is stored in the frame memo IJ3.
1K sequentially written. On the other hand, the biting coil 17 of the CRT
．． 24 is detected, and the signal corresponding to this deflection current is used as an address to sequentially read out the luminance data of the pixels from the frame memory 31, and this is sent to the luminance manual of '10RT to draw the own gI on the CRT. It is something.

To explain the writing of pixel data to the frame memory 31, the video signal is composed of the 191 and X signals corresponding to the horizontal and vertical positions of pixels on the CR7 screen, and two signals corresponding to the brightness of the pixels. ing. These X
, Y% 2 signals are respectively converted into digital values in bit no (rarell) format, the The X%Y signal input to the multiplexer 30 is used as an address with the X signal as the upper digit and the X signal as the lower digit, and is used to control the read/write controller. By,
The luminance data input from the second register is written to this address E of the frame memory 31. OR7 this operation
This is performed for each pixel on the screen, and pixel data for one frame is stored in the frame memory 31.

Next, the operation of reading out the pixel data written in the frame memory 31 will be explained.

The timing controller 5 receives the clock sent from the clock generator 6, divides the clock frequency to generate a timing signal 9, and transmits the timing signal to each terminal 5a%5b.
, 5c, 54.

2 to 2 correspond to the signal waveforms on the signal lines marked with x from 2 to 1 in FIG. 1. ■ in FIG. 2 is a timing signal corresponding to the pitch of pixels on the screen, and the clock wave of the clock generator 6 is
tt is used. ■ is a horizontal deflection timing signal that is applied to the horizontal deflection circuit in order to flow a constant cycle deflection current to the horizontal deflection coil 16, and similarly, ■ is a vertical deflection timing signal that is applied to the vertical deflection circuit; Each of the above clocks is frequency-divided. 3 is a timing signal for detecting the end point of horizontal scanning, and is a pulse wave having a period of the differential signal of the above-mentioned horizontal deflection timing signal.

When the horizontal deflection timing signal is sent to the amplifier 7 of the horizontal deflection circuit from the terminal 5a, the amplifier 7Fi amplifies it and applies it to each of the transistors 11 and 1 with an appropriate bias. The DC power supply voltage of the battery l is intermittently applied to the series circuit of the capacitor 15 and the horizontal deflection coil 16 by alternately conducting at a duty ratio of 1:1. At this time, since half of the power supply voltage is held in the capacitor 15, a square wave with positive and negative symmetry is applied to the horizontal deflection coil 16 after all. Each circuit constant is 111゜R1+R, akuL7 "R1...Internal resistance of horizontal deflection coil 11F...Resistance value of resistor 17 L...Inductance of horizontal deflection coil IH...Horizontal deflection current Therefore, the current axis tl flowing through the horizontal deflection coil 16 becomes a triangular wave-shaped current with positive and negative symmetry.

The horizontal deflection current IH is
The magnitude of the horizontal deflection magnetic field created by step 6 corresponds approximately to the horizontal position # of the bright spot on the screen, so if we know the magnitude of this current IH, we can determine the current bright spot in the horizontal direction of the screen from You can know the location.

This current IIi is detected in the form of an analog voltage value by a resistor 17, and this detected voltage is sent to the terminal 9a of the switch 9 via a lead wire 18 as a bright spot horizontal position signal. Figure 2 ■
shows the waveform of this bright spot horizontal position # signal.

The same operation as described above is performed in the vertical deflection circuit, and in response to the vertical timing signal sent from the terminal 5b to the amplifier 8, a vertical deflection current 1v having a triangular wave shape with positive and negative symmetry flows into the vertical deflection coil 23. This vertical deflection current 1v corresponds to the bright spot position in the vertical direction of the screen. And this current 1
v is detected as an analog voltage value by the resistor 25, and this is sent to the terminal 9bK of the switch circuit 9 as a bright spot vertical position signal.
Sent. FIG. 2 shows the waveform of this bright spot vertical position signal.

The horizontal and vertical position signals of the bright spot obtained by K in this way are
Each circuit constant is determined so that its magnitude corresponds to the X%Y signal of the video signal described above.

The bright spot horizontal position signal ■ is the contact point 9a of the switch circuit 9,
9 (1) and is inputted to the mu-D converter lO, where it is sequentially mu-D converted into a multi-bit parallel format digital signal at the timing signal period of the terminal 5d, that is, at the timing of the pixel pitch, and then The input signal is input to the latch circuit 27.The X launch circuit r latches the human input signal at the same timing as the mu-D converter lO, and sends it to the multiplexer 4.

On the other hand, when the switch circuit 9 receives the timing signal from the terminal 5C, that is, when one horizontal scan is completed, conduction occurs between the contacts 9b and 9a. It passes through the circuit 9 and is input to the mu-D converter 10, where it is converted into a multi-pit parallel format digital signal in the same way as described above, and then! Input to latch circuit A.

The Y latch circuit 4 latches the input signal at the same timing as the switching timing of the switch circuit 9 and sends it to the multiplexer 30.

These horizontal and vertical position signals input to multiplexer 4 represent the horizontal and vertical position products of the bright spot currently being scanned on both screens. this,
Use this address as the address with the bright spot vertical position signal as the upper digit and the bright spot horizontal position key signal as the lower digit.
Luminance data is sequentially read from the frame memory 31 under the control of the light controller 32. This address corresponds to the address by the I%Y signal mentioned above, so if you use this address to read the brightness take from the frame memory 31 and use it as the OR brightness input, if the ante is currently scanning The brightness of the bright spot at the horizontal and vertical position exactly corresponds to the original correct brightness at that position obtained from the video signal.

The jl&data read from the frame memory 31 is
The signals are sequentially sent to the DM converter 33 and converted into analog signals. The analog signal is ORed through a video amplifier.
It was sent to the brightness human power of Te, and it was decided to draw the first picture on both screens of OR.

In this way, CtR'l' the current bright spot position on the screen.

Detected from the deflection currents iH and iv of the horizontal and vertical deflection circuits, the correct brightness data of the bright spot position is read out from the frame memory 31 using the signal corresponding to this bright spot position as an address. Since the 0RT screen is drawn, if the deflection currents iH and iV are greatly distorted from the triangular waveform, the image on the 1c401 screen will be distorted.

FIG. 5 shows an embodiment of a circuit that sends a timing signal to an amplifier 7.8 in place of the timing controller 5 so that the screen size does not change even when the battery power supply voltage fluctuates. This is what is shown.

In the figure, the luminance horizontal position signal obtained from the resistor 17 of the horizontal deflection circuit is amplified by the amplifier γ and guided to one input of the comparator (, 39).The comparison voltage +Vg td is applied to the other input of the comparator (39). , Similarly, the comparator has a comparison voltage -
Vsta is connected, and the output of the comparator 39 [S R flip-flop chrysanthemum 8 power] and the output of the comparator is led to the R input. Either one of the outputs Q and CL of the 8R flip-flop is led to the input of the amplifier 7.

Regarding the vertical deflection circuit side, the bright spot vertical position from 1 resistance school is 11l14j in the same way! The output of the comparator is connected to the J input of the rK flip-flop, the output of the comparator is connected to the input, and the large input of cp is connected to the input of the comparator. Leads the output of the instrument. Either one of the outputs Q and Q of the JK flip-flop is led to an amplifier 8.

When the circuit is configured in this manner, the output of the SR flip-flop Kiku will not be inverted until the horizontal deflection current IH flowing through the resistor 17 exceeds a predetermined value on both sides. Therefore, the voltage of the battery l applied to the series circuit of the capacitor 15 and the horizontal deflection coil 16 is the voltage v0 in FIG. 4(a).
4 (1)) from the state of ゜, period T. .

Even if K decreases, the peak value iHP of the flowing horizontal deflection current IH remains unchanged, and its period only increases from T to T2. The same is true for the vertical deflection circuit, and in the end, only the line rate and frame rate change with respect to fluctuations in the power supply voltage, but the screen size does not change.

FIG. 5 shows another embodiment circuit that performs a similar function to that described above.

In the figure, the voltage of the battery I is divided by a voltage dividing resistor 6.46, which is led to a voltage controlled oscillator 47, and its oscillation output is led to a frequency divider 48. This divider hammer divides the oscillation output frequency into horizontal and vertical deflection frequencies and leads them to the inputs of amplifiers 7 and 8, respectively. If the frequency of the oscillation output of the voltage controlled oscillator 470 is adjusted appropriately so that it decreases as the voltage of the battery l decreases, a dynamic range similar to that explained in FIG. 4 can be obtained.

FIG. 6 shows a backlash correction circuit provided between the horizontal deflection circuit and the switch circuit 9.

There is a time delay between detecting the horizontal deflection current with the resistor 17 and reading the luminance data with the frame memory 31 and applying it as a 0RTK luminance signal. The bright spots will be dragged and delayed, but these
This causes what is called a 3-'fr. To correct this, in the former case it is necessary to advance the read address of the frame memory 31, and in the latter case it is necessary to delay it. FIG. 6 shows a correction circuit for this purpose, in which part of the voltage across the horizontal deflection coil 16 (#1 is a square wave) is added to the voltage across the resistor 17 as a bright spot horizontal position signal, or The read address is advanced or delayed by using the subtracted value.

This correction circuit detects the voltage across the resistor 17 with the resistor O, leads it to the input of the amplifier (supply), and adds the voltage across the deflection coil 16 to this with the resistor 51.52, or
It is configured to subtract by 3.54.

Then, the degree of addition is adjusted to an appropriate value by the ratio of the resistors 51 and 52, and the degree of subtraction is adjusted to an appropriate value by the ratio of the resistors 53 to 54. Generally, it is necessary to advance the read address by a time delay, so a correction circuit is constituted by an adder circuit including resistors 51 and 52.

FIG. 7 is a circuit diagram of an improved embodiment of the horizontal deflection circuit.

This circuit applies the principle of a fly bank transformer, and prevents a phenomenon in which the deflection current is stale at the positive/negative portion due to the influence of the diodes 13 and 14. Its configuration uses a coil 16' provided with a winding tap 16a' as a horizontal deflection coil;
' of transistors 11 and 12! Connect to the II connection point,
The end of the coil 16' is connected to the junction of the diode 13.14.

[Explanation of Application Example] The present invention is applied to an electromagnetic deflection type C! Not limited to RT only, electrostatic deflection type C
It is also applicable to RT.

Further, since the deflection current becomes a considerably distorted triangular wave, if screen scanning stray electricity is not uniform, it is desirable to perform brightness correction in an amount inversely proportional to its speed.

In addition, in this embodiment, the signal for detecting the horizontal and vertical positions of the bright spot is obtained from both the horizontal and vertical deflection circuits, but of course, the present invention applies only to the horizontal deflection circuit where efficiency is a particular issue. The vertical deflection circuit may be configured to perform deflection using a conventional current-controlled linear amplifier.

Even in this case, it is of course possible to know the current position of the scanning line using the resistor 4 of the vertical deflection circuit.

Furthermore, in the above case we can trust the linearity of the vertical deflection,
If a general TV-like sawtooth wave is used as the deflection current instead of a triangular wave that performs back-and-forth scanning, the frame memory 31 must store the incoming video signal or its pixel data string for one frame. Instead, a buffer for storing at most one line of horizontal scanning may be provided to control the read address. As this buffer, Ficct+%BBI),
Alternatively, a shift register or the like can be used.

[Explanation of effects]

Since the present invention has the above-described structure and operation, O
Distortion of the R screen will no longer occur. Special K.

Regardless of whether the deflection current has distortion, excess or deficiency in amplitude, or fluctuation in period, these do not cause screen distortion, so the configuration of the deflection circuit can be made extremely simple. A linear amplifier, a stabilized power supply, or a linearity correction circuit (such as a parametric interface, a bottle cushion transformer, etc.) can be used at low cost.
Expensive and complicated circuits such as magnetic modulation coils for linearity correction are no longer required. Furthermore, the present invention eliminates the need for an additional circuit that sacrifices power efficiency, and the screen does not become distorted even when the power supply voltage fluctuates. It will be particularly useful.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention. FIG. 2 is a waveform diagram of signals from the timing controller, etc. FIG. 3 is a circuit diagram of an embodiment of the timing controller K. FIG. 4 is an explanatory diagram of the operation of the above-described embodiment circuit. Fig. 5 is a circuit diagram of a company timing controller, troller K car, and other embodiment circuits. FIG. 6 is a backlash correction circuit diagram. Figure 7 is a circuit diagram of an improved deflection circuit applying the principle of the company's flyback transformer. 16.24...Deflection coil, 31...Frame memory, feather, 39.42, Invitation...Comparator, chrysanthemum, 44...
・Flip-flop, 47-...Voltage side-oscillator. Patent applicant: Yokogawa Electric ISO Manufacturing Co., Ltd. Representative: Patent attorney Nao Takashi Ide M2 Figure] 638- M7 times

Claims (3)

[Claims] (1) A storage circuit that stores pixel data of an input video signal at an address corresponding to the synchronization of this input video signal, a supply circuit that supplies a deflection signal to the deflection circuit of the CRT, and a detection circuit that detects this deflection signal. , an OR'r display comprising: a control circuit that reads out the pixel data from an address in the storage circuit corresponding to the output signal of the detection circuit; and a circuit that applies the pixel data read out by the control circuit to the luminance input of the CRT. Device. (2) The supply circuit is configured to include an oscillation circuit that detects the device power supply voltage and changes the oscillation frequency according to the power supply voltage, and is configured to change the period of the deflection signal by the output of the oscillation circuit. CR7 display device as described in section 3. (3) The supply circuit includes a comparison circuit that detects that the output signal of the detection circuit has reached a predetermined upper and lower limit, a flip-flop circuit that is activated by the upper and lower limit detection output of this comparison circuit, and a flip-flop circuit that operates based on the upper and lower limit detection output of this comparison circuit. The CR7 display device according to claim 1, further comprising a switch circuit that switches the supply of the deflection signal to the deflection circuit according to the output.