JPH05224618A - Image display device - Google Patents

Abstract

PURPOSE:To provide the low unnecessary-radiation image display device as a computer display. CONSTITUTION:A horizontal deflection circuit 17 is composed of a bi-directional scanning system and a vertical deflection circuit 18 is composed of a staircase system; and the current flat parts are provided at the horizontal deflection current and the vertical deflection current and the phase relation between the horizontal deflection current and vertical deflection current is so set that when one is flat, the other is not. The time base of a video signal is inverted at intervals of a horizontal scanning line by an A/D converter 6, switch circuit 7 and 10, line memories 8 and 9, a D/A converter 11, and a digital control circuit 16 to make a display. Consequently, no horizontal flyback pulse is generated and the low unnecessary-radiation image display device is obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device suitable for a computer display or the like.

[0002]

2. Description of the Related Art In recent years, in computer displays, there is a great problem to reduce unnecessary radiation such as electric field and magnetic field emitted from the display because it may damage the health of the user. Conventionally, the display chassis has been made of metal to provide an electrostatic shield or an electromagnetic shield to achieve the purpose.

As a method of reducing unnecessary radiation itself emitted from a display, a horizontal deflection circuit system has been proposed which pays attention to unnecessary radiation emitted from a horizontal deflection circuit and does not generate a flyback pulse.

As a known example of this system, there is JP-A-53-133333.

[0005]

However, among the above-mentioned conventional techniques, the method of shielding has a problem that it takes time because of increase in weight and price due to use of metal and trial and error study.

Further, with respect to the horizontal deflection circuit which does not generate the flyback pulse, there is a problem that the specific circuit configuration is not clear.

An object of the present invention is to solve the above-mentioned drawbacks of the prior art, to clarify a concrete circuit configuration of a horizontal deflection circuit which does not generate a flyback pulse, and to provide a low unnecessary radiation image display device for a computer display. It is in.

[0008]

SUMMARY OF THE INVENTION The above-mentioned object is to provide a bidirectional scanning type horizontal deflection circuit, a counter, a D / A converter, which comprises a switching means connected to a horizontal deflection coil and a switching pulse generating circuit for driving the switching means.
The time axis of the video signal is inverted every horizontal scanning line by the staircase type vertical deflection circuit consisting of a current amplifier, the video signal A / D converter, two line memories, the video signal D / A converter, and the digital control circuit. It is achieved by displaying.

[0009]

In the bidirectional scanning type horizontal deflection circuit, the switching means is turned on and off at predetermined time intervals by the switching pulse from the switching pulse generation circuit, and the positive, zero, negative and zero voltages are applied to the horizontal deflection coil for a predetermined time. Give at intervals. As a result, a triangular wave current having a flat portion at the maximum and minimum values flows in the horizontal deflection coil with the same scanning time in both directions.

In the staircase type vertical deflection circuit, a horizontal synchronizing signal is counted by a counter, the output thereof is input to a D / A converter to obtain a stepwise vertical sawtooth wave, and a current amplifier produces a staircase-like vertical sawtooth wave. Apply vertical deflection current.

At both ends of the horizontal scanning, only vertical deflection is performed, so that the scanning lines are horizontal and parallel and are evenly spaced.

Since it is necessary to invert the time axis of the video signal for each horizontal scanning line for scanning in both directions, the video signal is digitized by the A / D converter and stored in the memory, which is then horizontally stored by the D / A converter. This is realized by reversing the reading direction for each scan.

As a result, the specific circuit configuration of the horizontal deflection circuit which does not generate the flyback pulse is clarified, and the low unnecessary radiation image display device for computer display can be provided.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. In addition, in each figure, those having the same function are denoted by the same reference numerals.

FIG. 1 is a block diagram of an image display device of the present invention. In FIG. 1, 1 is a primary color R signal input terminal, 2
Is a primary color G signal input terminal, 3 is a primary color B signal input terminal, 4 is a horizontal synchronization signal input terminal, 5 is a vertical synchronization signal input terminal, 6
Is an A / D converter, 7 is a first switch circuit, 8 is a first line memory, 9 is a second line memory, 10 is a second switch circuit, 11 is a D / A converter, 12
Is a video circuit, 13 is a color cathode ray tube, 14 is a horizontal deflection coil, 15 is a vertical deflection coil, 16 is a digital control circuit, 17 is a bidirectional scanning type horizontal deflection circuit,
Reference numeral 18 denotes a staircase type vertical deflection circuit.

The operation of FIG. 1 will be described with reference to FIGS. 2 to 7. FIG. 2 shows operation waveforms of a conventional horizontal deflection circuit.
Reference numeral 9 is a horizontal deflection current waveform, and 20 is a horizontal deflection voltage waveform. During the horizontal blanking period TR, as shown in the figure, high voltage (approx.
A flyback pulse of 1 kV) is generated and is a source of electric field and magnetic field of several hundred kHz. Therefore, in order to prevent unnecessary radiation, a horizontal deflection circuit that does not generate a flyback pulse is required in principle.

FIG. 3 is an operation waveform diagram of a conventional vertical deflection circuit, and 21 is a vertical deflection current waveform.

FIG. 4 is a raster of a conventional image display device formed by the deflection currents shown in FIGS. 2 and 3, in which the electron beam is moving in an oblique direction.

FIG. 5 shows operation waveforms of the horizontal deflection circuit of the image display device of the present invention, 22 is a horizontal deflection current waveform, and 23 is a horizontal deflection current waveform.
Is a horizontal deflection voltage waveform. From time t1 to t2, by applying a positive voltage to the horizontal deflection coil, a monotonically increasing current is generated. From time t2 to t3, a constant positive current flows by applying 0 voltage to the horizontal deflection coil. From time t3 to t4, a monotonically decreasing current is generated by applying a negative voltage to the horizontal deflection coil.
From time t4 to t5, a constant negative current flows by applying a voltage of 0 to the horizontal deflection coil. As a result, a triangular wave current having a flat portion at the maximum and minimum values flows in the horizontal deflection coil with the same scanning time in both directions.

FIG. 6 shows an operation waveform of the staircase type vertical deflection circuit, and 24 is a vertical deflection current having a flat portion corresponding to the horizontal scanning line.

If a flat portion of the current is provided for the horizontal deflection current and the vertical deflection current, and when one is a flat portion and the other is not a flat portion, only vertical deflection is performed at both ends of the horizontal scanning. As shown in the raster of the image display device of the present invention, the scanning lines are horizontal and parallel, and are evenly spaced.

Since it is necessary to invert the time axis of the video signal for each horizontal scanning line for bidirectional scanning, the video signal is digitized by the A / D converter 6 and stored in the line memories 8 and 9 in FIG. This is realized by the D / A converter 11 reading out while reversing the reading direction every horizontal scanning.

FIG. 8 is a principle diagram of the horizontal deflection circuit of the present invention. 25 is a positive power supply input terminal, 25 'is a negative power supply input terminal, 26, 27 and 28 are switching means, and 29 is a switching pulse generating circuit. is there.

By the switching pulse from the switching pulse generating circuit 29, the switching means 26, 27,
28 turns on and off at predetermined time intervals and applies the voltage shown at 23 in FIG. 5 to the horizontal deflection coil. As a result, 22 in FIG.
The horizontal deflection current shown in the figure flows.

FIG. 9 shows a first embodiment of the horizontal deflection circuit of the present invention, in which 30 is a power input terminal, 31, 32, 33, and
34 is a drive amplifier, 35, 36, 37 and 38 are drive transformers, 39, 40, 41 and 42 are MOS-FEs.
T, 43, and 44 are diodes.

Drive amplifier 31, drive transformer 3
7. The MOS-FET 39 serves as the switching means 26, the drive amplifier 32, the drive transformer 38, and the MOS-F.
ET40 is the switching means 27, drive amplifier 3
3, the drive transformer 35, the MOS-FET 41, the diode 43 and the drive amplifier 34, the drive transformer 36, the MOS-FET 42, and the diode 44 correspond to the switching means 28.

FIG. 10 shows a second embodiment of the horizontal deflection circuit of the present invention. The difference from FIG. 9 is that the capacitors 45 and 46 are different.
Is provided and the voltage applied to the positive power supply input terminal 25 is divided into two, so that the negative power supply input terminal 25 'is excluded. The basic operation is the same as in FIG.

FIG. 11 shows a concrete circuit of the switching pulse generating circuit 29 of the horizontal deflection circuit of FIGS. 9 and 10 of the present invention. In FIG. 11, 53 is a PLL circuit, 54 is a flip-flop, 55 and 56 are one-shot multivibrators, 57 and 58 are AND gates, 59 is a horizontal deflection voltage input terminal, 60 is a capacitor, 61 is a transformer, 6
2, 63, 64 and 65 are diodes, 66, 69 and 70
Is a resistor, 67 and 68 are capacitors, 71 is a power input terminal, and 72, 73, 74 and 75 are switching pulse output terminals.

The operation of FIG. 11 will be described below with reference to FIG. The horizontal synchronizing signal input terminal 4 receives the signal HD of FIG. 12A, and the horizontal deflection voltage input terminal 59 of FIG.
It is assumed that the signal VH in (b) is input. Signal VH
Is applied to the diodes 62, 63, 64 and 65 via the capacitor 60 and the transformer 61, and the signal VH ′ of FIG. 12C is generated in the resistor 66. Signal HD and signal V
The phase of H ′ is phase-controlled by the PLL 53 so that the trailing edges coincide with each other. The output pulse from the PLL 53 is
The signals V1 and V2 shown in FIGS. 12D and 12E are obtained as the output pulses of the flip-flop input to the flop 54. The signal V1 is sent to the one-shot multivibrator 55 and A
By being processed by the ND gate 57, the signals V3 and V5 of FIGS. 12F and 12H are obtained at the switching pulse output terminals 72 and 73. Similarly, the signal V2 is processed by the one-shot multivibrator 56 and the AND gate 58 to output the switching pulse output terminal 7
4 and 75, the signals V4 and V6 shown in FIGS. By applying the signals V3, V4, V5, V6 to the drive amplifiers 33, 34, 31, 32, a desired operation can be obtained.

FIG. 13 shows a third embodiment of the horizontal deflection circuit of the present invention, in which 47 and 48 are MOS-FETs and 49 and 5.
0 is a diode.

Drive amplifier 31, drive transformer 3
7. The MOS-FET 39 serves as the switching means 26, the drive amplifier 32, the drive transformer 38, and the MOS-F.
ET40 is the switching means 27, drive amplifier 3
3, the drive transformer 35, the MOS-FET 47, the diode 49 and the drive amplifier 34, the drive transformer 36, the MOS-FET 48, and the diode 50 correspond to the switching means 28.

FIG. 14 shows a fourth embodiment of the horizontal deflection circuit of the present invention, and 51 and 52 are MOS-FETs.

Drive amplifier 31, drive transformer 3
7. The MOS-FET 39 serves as the switching means 26, the drive amplifier 32, the drive transformer 38, and the MOS-F.
ET40 is the switching means 27, drive amplifier 3
3, drive transformer 35, MOS-FET 51 and drive amplifier 34, drive transformer 36, MOS-F
The ET 52 corresponds to the switching means 28.

FIG. 15 shows a concrete circuit of the switching pulse generation circuit 29 of the horizontal deflection circuit of FIG. 13 of the present invention, and 76 and 77 are switching pulse output terminals.

FIG. 16 shows an operation waveform diagram of the second switching pulse generation circuit. The basic operation is the same as that of the first switching pulse generation circuit of FIG.

By applying the signals V1, V2, V5 and V6 to the drive amplifiers 31, 32, 33 and 34, a desired operation can be obtained.

FIG. 17 shows a concrete circuit of the switching pulse generating circuit 29 of the horizontal deflection circuit of FIG. 14 of the present invention. 78 and 79 are OR gates and 80 and 81 are switching pulse output terminals.

FIG. 18 shows an operation waveform diagram of the third switching pulse generating circuit. The basic operation is the same as that of the first switching pulse generating circuit of FIG.

A desired operation can be obtained by adding the signals V5, V6, V9 and V10 to the drive amplifiers 31, 32, 33 and 34.

FIG. 19 shows an embodiment of the staircase type vertical deflection circuit of the present invention, in which 82 is a counter, 83 is a D / A converter, 84 and 87 are resistors, 85 is an amplifier, and 86 is a capacitor. The operation of this circuit will be described below.

The horizontal synchronizing signal HD input to the horizontal synchronizing signal input terminal 4 is counted by the counter 82 and its output is input to the D / A converter 83. Since the vertical synchronizing signal VD input to the vertical synchronizing signal input terminal 5 is input to the reset terminal of the counter 82, the output of the D / A converter 83 becomes a stepwise vertical sawtooth wave. By inputting this stepwise wave-shaped vertical sawtooth wave into the amplifier 85 via the resistor 84, a stepwise wavelike vertical deflection current is passed through the vertical deflection coil 15.

FIG. 20 is an operation waveform diagram of the image display device of the present invention, showing the phase relationship between the vertical deflection current 24, the horizontal deflection current 22, and the video signals 88, 89, 90, 91.

The horizontal deflection current 22 and the vertical deflection current 24 are
Since the phase relationship is set so that when one is a flat portion and the other is not a flat portion, only vertical deflection is performed at both ends of horizontal scanning, and scanning lines are horizontal and parallel, and are evenly spaced.

The video signal 88 corresponds to the line memory 8 of FIG.
The video signal 89 is a read signal from the line memory 8 in FIG. Video signal 9
0 is a write signal to the line memory 9 in FIG.
The video signal 91 is a read signal from the line memory 9 in FIG. By reversing the reading direction from the line memory 9 to the writing direction, the time axis of the video signal is inverted for each horizontal scanning line to be displayed.

FIG. 21 is a second block diagram of the image display device of the present invention, in which 92 is a bus interface, 93 is a frame memory, and 94 is a digital control circuit.

The difference from the first block diagram of the image display device of the present invention in FIG. 1 is that the input of the image display device is a bus interface 92 and a frame memory 93 connected to this bus interface 92 is used. That is the point.
Under the control of the digital control circuit 94, the reading direction or the writing direction of the frame memory 93 is inverted for each horizontal scanning line and the D / A converter 1
By inputting 1 to the video signal, the time axis of the video signal can be inverted and displayed for each horizontal scanning line.

[0047]

As described above, according to the present invention, it is possible to clarify the specific circuit configuration of the horizontal deflection circuit that does not generate a flyback pulse and provide a low unnecessary radiation image display device for a computer display. ..

[Brief description of drawings]

FIG. 1 is a first block diagram of an image display device of the present invention.

FIG. 2 is an operation waveform diagram of a conventional horizontal deflection circuit.

FIG. 3 is an operation waveform diagram of a conventional vertical deflection circuit.

FIG. 4 is an explanatory diagram of a raster of a conventional image display device.

FIG. 5 is an operation waveform diagram of the horizontal deflection circuit of the present invention.

FIG. 6 is an operation waveform diagram of the vertical deflection circuit of the present invention.

FIG. 7 is an explanatory diagram of a raster of the image display device of the present invention.

FIG. 8 is a principle diagram of a horizontal deflection circuit of the present invention.

FIG. 9 is a diagram showing a first embodiment of a horizontal deflection circuit of the present invention.

FIG. 10 is a diagram showing a second embodiment of the horizontal deflection circuit of the present invention.

FIG. 11 is a first switching pulse generation circuit diagram of the present invention.

FIG. 12 is an operation waveform diagram of the first switching pulse generation circuit.

FIG. 13 is a diagram showing a third embodiment of the horizontal deflection circuit of the present invention.

FIG. 14 is a diagram showing a fourth embodiment of the horizontal deflection circuit of the present invention.

FIG. 15 is a second switching pulse generation circuit diagram of the present invention.

FIG. 16 is an operation waveform diagram of a second switching pulse generation circuit.

FIG. 17 is a third switching pulse generation circuit diagram of the present invention.

FIG. 18 is an operation waveform diagram of the third switching pulse generation circuit.

FIG. 19 is a diagram showing an embodiment of a vertical deflection circuit of the present invention.

FIG. 20 is an operation waveform diagram of the image display device of the present invention.

FIG. 21 is a second block diagram of the image display device of the present invention.

[Explanation of symbols]

1 ... Primary color R signal input terminal, 2 ... Primary color G signal input terminal, 3
… Primary color B signal input terminal, 4… Horizontal sync signal input terminal, 5
... Vertical sync signal input terminal, 6 ... A / D converter, 7 ...
First switch circuit, 8 ... First line memory, 9 ... Second line memory, 10 ... Second switch circuit, 11 ...
D / A converter, 12 ... Video circuit, 13 ... Color cathode ray tube, 14 ... Horizontal deflection coil, 15 ... Vertical deflection coil, 16 ... Digital control circuit, 17 ... Bidirectional scanning system horizontal deflection circuit, 18 ... Staircase system vertical deflection circuit , 26, 27, 28 ... Switching means, 29 ... Switching pulse generation circuit, 92 ... Bus interface,
93 ... Frame memory, 94 ... Digital control circuit.

Claims (10)

[Claims] 1. A horizontal deflection current and a vertical deflection current are provided with flat portions of current, and when one is a flat portion, the other is not a flat portion. Alternatively, an image display device characterized by moving only in the vertical direction. 2. The image display device according to claim 1, wherein the horizontal deflection circuit comprises a switching means connected to the horizontal deflection coil and a switching pulse generation circuit for driving the switching means, and a voltage applied to the horizontal deflection coil is applied to the horizontal deflection circuit. An image display device characterized in that positive, 0, negative, and 0 are changed in this order at a frequency which is half the horizontal synchronizing frequency to perform image display in both directions of horizontal deflection scanning. 3. A horizontal deflection circuit for an image display device according to claim 2, wherein the switching means comprises two switching elements connected in series with a horizontal deflection coil connected at a connection point and two switching elements connected in parallel with the horizontal deflection coil. The horizontal deflection circuit is characterized by being configured by the switching element of. 4. A horizontal deflection circuit for an image display device according to claim 2, wherein the switching means is composed of four switching elements connected in series with a horizontal deflection coil connected to a central connection point. Horizontal deflection circuit. 5. A horizontal deflection circuit for an image display apparatus according to claim 2, wherein the switching means is composed of two sets of two switching elements connected in series and having four horizontal deflection coils connected to each other. Characteristic horizontal deflection circuit. 6. The switching means for a horizontal deflection circuit according to claim 3, wherein the two switching elements connected in series are MOS-FETs, and the two switching elements connected in parallel with the horizontal deflection coil are MOS-FETs. A horizontal deflection circuit characterized by being configured by connecting a diode and a diode in series. 7. The horizontal deflection circuit according to claim 4, wherein the four switching elements connected in series are constituted by MOS-FETs. 8. A horizontal deflection circuit according to claim 5, wherein the switching means of the horizontal deflection circuit according to claim 5 comprises two sets of four switching elements connected in series, which are MOS-FETs. 9. A bidirectional scanning type horizontal deflection circuit comprising a video signal / synchronization signal input terminal, switching means connected to the horizontal deflection coil, and a switching pulse generation circuit for driving the switching means, and a counter for counting horizontal synchronization signals. , A staircase type vertical deflection circuit consisting of a D / A converter that receives the output of the counter and a current amplifier that receives the output of the D / A converter, an A / D converter for video signals, and the output of the A / D converter Of two sets of line memories having different read or write directions, and a video signal D / A converter having the output of the line memory as input, an A / D converter, two sets of line memories, D / A converter The time axis of the video signal is reversed for each horizontal scanning line by the digital control circuit that controls the Image display device is characterized in that is displayed by. 10. A bus interface for a computer,
A bidirectional scanning type horizontal deflection circuit including a switching means connected to the horizontal deflection coil and a switching pulse generation circuit for driving the switching means, a counter for counting the horizontal synchronizing signal, and a D / which receives the output of the counter.
A staircase type vertical deflection circuit consisting of a current amplifier that receives the outputs of the A converter and D / A converter, and a frame memory that is connected to the bus interface and has a different reading direction or writing direction for each line, and the output of the frame memory An image characterized by inverting the time axis of the video signal for each horizontal scanning line by means of a D / A converter for a video signal which inputs the signal and a digital control circuit for controlling the frame memory and the D / A converter. Display device.