JPS58154907A - Multi-stage differential amplifying circuit - Google Patents

Abstract

PURPOSE:To decrease the number of externally mounted components for circuit integration, to miniaturize the circuit and to reduce the cost, by providing a feedback resistor between the final and the first stage of a multistage differential amplifying circuit and between an inverting and a noninverting terminal of the 1st stage. CONSTITUTION:A collector signal of a TRQ1 is fed back to a base of the TRQ1 negatively via a feedback resistor RNF12 and a signal of a TRQ12 is fed back negatively to the base of a TRQ2 via a feedback resistor RNF1. Only when the resistance value of each feedback resistor is almost made equal, the DC level of each base of the TRsQ1, Q2 at the noninverting output terminal 16 and the inverting output terminal 15 independently of the effect of the base current of the TRsQ1, Q2. Since the feedback resistors RNF1, RNF12 are taken sufficiently larger than load resistors R1-R12, the same chracteristics as conventional circuits are obtained in terms of AC and DC. A capacitor for high frequency by- pass is saved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a multi-stage differential amplifier circuit, and is used, for example, in an intermediate frequency amplifier circuit integrated into a radio receiver.

[Technical background of the invention]

Figure 1 shows a conventional example of an intermediate frequency amplification circuit for a radio receiver.
The output of the compensation code l111 is applied to the input terminal 12 via the coupling capacitor rytc4. An example of this amplifier circuit, ell#6, is @lj! where a pair of transistors are directly connected to multiple Tkh amplifiers in multiple stages. l(tsutJl
*) Differential increase @IID Muojifs @Rth stage (final stage)
The differential amplifier DA6 or hIIIR is used. Resistance R1
,...

11m is connected correspondingly between the tryd star 04a and the rector power supply of the 1st 11th excitation @IID module is""sD module. Therefore, the base of the transistor Q3 is connected to the terminal 111.
g@@, and is connected to Wl via this terminal IS and capacitor tc in series.

In addition, transistor Qs = Qm @10 difference s increase m5
The DAI meeting *g. A capacitor tCs is also connected between the terminal 14 and ground. Capacitor CI #
C@ is a capacitor that prevents the AC output signal from returning to the input signal, causing the input to drop and oscillate. The transistors Qs s Qa m-aQ** are the second to sixth differential amplifiers @ D A s to mDAst”
is forming.

In the above amplifier circuit, the current flowing through each constant current source 11s''e■- is equal, and the resistance values of each resistor R1s...IRIm are set equal to each other. , 11: I=4・T=Any 1=R, : Song...=R・ The non-inverting output terminals 16 between the p0 anti-inverting input terminals constitute the final stage differential amplifier DA-, respectively. The active inverting output terminal 15 correspondingly derived from the collector of each transistor Q11.QIm, the pitch fSlllKt; It is inserted between the nine non-inverting output terminals 16 and the terminals 13. The straight terminals 12 and the terminals 13
An input resistor R1N for determining the input impedance is inserted between h.

In such a conventional intermediate frequency amplification circuit, a signal supplied to the non-inverting output terminal is fed back to the transistor Q through the feedback resistor RNt1. The output signal of the inverted output terminal 1j is connected to the feedback resistor IILB needle R and the input resistor J.
, through which the pace KRji of the transistor QI is applied. and transistor Qs * Qs
(The signal supplied to the 0% base is connected to the capacitor Cs@C@K, respectively).The high frequency component is grounded to the reference potential point (ground) K, 4.

This results in an inverting output terminal 15 and a non-inverting output terminal 1.
10 [K to stabilize the level] If it is possible to stabilize the intermediate frequency of a radio receiver, it is also possible.

[Background afrOoka issue]

However, when implementing such an intermediate frequency amplification circuit into an IC, as shown in 11QK, the 11110Δ id
XR mode Cm e Cs O external terminal for contact 11.
14 must be provided separately - D circle - ζO eme,
For example, when converting the intermediate station *IIkjl@interface as described above into an integrated circuit for m-way pipes such as a phase-locked loop, there are many external crystal points for ICKF14, and it takes a lot of work in the construction process. Unfortunately, the increase in the number of IC main body bins (electrode lead-out terminals) pushed up the 9IC manufacturing cost.

[Purpose of the invention]

Jin's invention was made in view of the above points, and by converting ZC into a suitable %IC and reducing the number of external S components in 9 cases, it is possible to miniaturize the device in which this IC is mounted and reduce costs. It is an object of the present invention to provide a good multi-stage differential amplifier circuit that can contribute to reduction in the number of outputs.

[Summary of the invention]

This invention relates to a multi-stage differential amplifier circuit in which a plurality of differential amplifiers are connected in multiple stages, in which a differential amplifier is inserted between the non-inverting output terminal of the final-stage differential amplifier and the inverting input terminal of the first-stage differential amplifier. A second feedback resistor is preferably provided between the resistor, the inverting output terminal of the first-stage differential amplifier, and the non-inverting input terminal of the first-stage differential amplifier.

[Embodiment of JR1 Akira] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

One embodiment of the present invention is applied, for example, to an intermediate frequency amplification circuit of a 1M radio receiver, and includes first to sixth differential amplifiers DA to DA as shown in FIG.

has. These Ill to 60th differential amplifiers DA.

Transistors Q1 to Q1m% forming DA@ to constant current source 11*RI1e..., I・, load resistance R1 to m
11m, terminal 1101B, inverting output terminal 15, non-inverting output terminal 16, and ff11R resistor RNFj are the same as in FIG. 111, and will be explained using the same reference numerals as in FIG. 1.

That is, this circuit has a feedback resistor RNF1 (hereinafter referred to as RMWj
is called the feedback resistance of Ill).
Non-inverting output terminal of amplifier circuit DA・ and first RO difference increase @
4! It is the same as the conventional method in that the inverting input terminals of IDA 1 are connected to each other, but unlike the conventional method, the inverting output terminal of the first differential amplifier iDA and the first stage amplifier DA are connected to each other.
1 non-inverting input terminal, feedback resistor RMFI, input resistor RI
The difference is that a second 1liI feedback resistor RNF12 is used to connect the inverting output terminal and the non-inverting input terminal of the first stage in a feedback manner, without providing feedback via Nt. 1), the resistor RNF2tv1 shown in FIG. 1 is removed, and the transistor Q1 as shown in FIG.
The second feedback resistor Rsr12 is inserted and connected between the connection midpoint between the collector of the transistor Q1 and the load resistor R1, and the base of the transistor Ql.

Accordingly, the external connections for the non-inverting output terminal 12 and the inverting input terminal 13 are also changed as appropriate. The output end of the tn signal source 11 is connected in parallel to the input resistor R4N and then to the terminal 12 via the sensor C1 in series. The terminal 12 is supplied with power via a capacitor Cm as in the conventional case.

Multi-stage difference II applied to the above intermediate frequency amplification circuit
In the J multiplying circuit, the signal at the collector of the transistor Q1 is negatively fed back to the base of the transistor Q1 via the feedback resistor RNF12t'', and the signal from the transistor Qsm is fed back to the base of the transistor Qs via the sea resistor RNF1. (ME style) takes.

In this case, assuming that the base current of the transistor Q10 is almost negligible, the structure of the transistor Qt (if the D pace and collector potential are vml and Vcl, respectively, it becomes vml"vcl. Also, each differential amplifier DAB s DAD m・
....

If the gain in the open route of the multi-stage theoretical amplification is sufficiently large, the feedback resistor RaF1 must be used to round off the negative feedback and the transistor. The proverbial base potential vB is equal to the pace potential VHK of the transistor Ql, which is tp vml-v1.

Also, since the transistors Q1 and Qs are both so-called pair transistors having substantially the same electrical characteristics, the collector current of each transistor Q* a Qs is 1(1a I(2 is Ic1 = I(2=I Therefore, if the voltage #Avcc1L voltage is indicated by VCC, the resistance value of the resistor R1#R is indicated by its sign, and the collector voltage of the transistor Qs is indicated by Vc2, then vcl :Vcc + IC1' R1vc2 = v
cc -112'Rmaro, from the above, V(1=V(2=V((I 1-R1/2).

The output levels of the output terminal 16, the non-inverting output terminal 16, and the inverting output terminal 15 are respectively set as Vol #V. 2, resistance RI
If the value of IIRII is indicated by its sign, R* = Rst
If each constant is determined so that =Rss and 11=I1m, v01=v02 can be obtained.

This holds true when it is assumed that the base current ImI of the transistor Qo is ignored; in reality, #il and the second feedback resistor RNFI・Lir12
Each resistance value is each load resistance R1aR1m...l'Lt
The current flowing through RN112, that is, the current flowing through each of the transistors Q*-Qs tI1.11
・It becomes impossible to ignore I.

However, as mentioned above, the first and second feedback resistors KR
Assuming that the resistance values of MFI and 1brytz are approximately equal, the resistance value of each resultant resistor RNFI # RNF2 is indicated by its sign, and the voltage drop tVix of each of them is
yl m Vmwy1x, vmwyt
:″1m1°RNII V-Otori MF12 = 1.2° RN, 2 and 9
, RNF1 = RMF12 and l1ll = I12, so VIMFI ``'' VIMFI2, and hence Vc 1 '' Vm 1 + VINF 1v@1:
Increase Vll + VINF12, and V,
, = v, 2, it becomes vCl"Vol. Only when the resistance values of each feedback resistor are made approximately equal, the non-inverting output terminal 1 is independent of the influence of the pace current of transistor Q*aQs. #, the inverting output terminal 15, and the valley base DC levels of the transistors Q1 and sQs can be made equal.

In addition, each feedback resistor RNFI # RNFI
The resistance values of each of the load resistances R1s, R1e..., R■ in 2 were made sufficiently large, so the 3vA circuit is no different from the conventional circuit shown in Figure 1 in terms of AC. This circuit exhibits characteristics equivalent to those of conventional circuits in terms of both current and alternating current.

That is, this circuit performs the same operation as the conventional circuit, and can omit one capacitor for high frequency (intermittent alternating current) pinos. This result this time @
'When converting to iIC, the number of IC terminals is 1! - For example, even if a circuit with other functions is installed in the same IC, it will be possible to reduce the number of ICs (IC4) that performs many functions 1'' without significantly increasing the number of circuits that have other functions. It also becomes possible to do so.

Furthermore, since the number of external parts of the IC can be reduced, the packaging density of the components of a radio receiver, for example, can be increased, and the manufacturing cost can be reduced to t'A-value.

Although the multi-stage differential amplifier circuit described above is constructed by directly connecting six driving amplifiers in multiple stages, any number of stages may be used as long as a predetermined open loop f8 gain can be obtained.

First, as shown in Figure 3, each load resistor R1 #...111m power supply example does not necessarily need to be commonly connected to the same switch 7 if the same voltage is to be supplied. It's okay. Hirodo in the same part as Figure 3 middle part 2m.
Reference numerals are given and explanations thereof are omitted.

In addition, although this multistage differential amplification circuit is applied to a radio receiver, it is not limited thereto, and can be applied to any part that performs AC signal amplification. - It goes without saying that various other modifications and applications are possible without departing from the gist of the invention.

[Effect of hammer]

As described above, according to the present invention, it is suitable for IC implementation,
By reducing the number of external components when integrated into an IC, it is possible to provide a good multi-stage differential amplifier circuit that can contribute to downsizing and cost reduction of the device in which this Ct is mounted.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional multi-stage differential amplifier circuit, Figure 2 is a circuit diagram showing an embodiment of the multi-stage differential amplifier circuit according to the present invention, and Figure 3 is a modification of the circuit shown in Figure 2. FIG.

Claims (1)

[Claims] In a multi-stage differential amplifier circuit in which a plurality of differential amplifier circuits are connected in multiple stages, a first output terminal is inserted between the non-inverting output terminal of the final-stage differential amplifier and the inverting input terminal of the first-stage differential amplifier. A second resistor which is inserted between the R resistor and the difference 1gl of the first stage + the inverting output terminal of the differential amplifier and the non-inverting input terminal of the differential amplifier and has a resistance value substantially equal to the above-mentioned first C) resultant resistor.
1. A multistage differential amplifier circuit comprising: a feedback resistor;