JPS58154264A - Hall effect semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To unnecessitate the selection and classification of elements, by forming them in a characteristic wherein a plurality of output terminals perform switching at different operating flux densities. CONSTITUTION:Two kind of Hall elements 1, 1' with Hall output voltages different to flux densities are manufactured by being adjacent each other on the same Si substrate 6. Amplifying circuits 2, 2', Schmitt trigger circuis 3, 3', and output circuits 4, 4' which are directly connected to the elements 1, 1' are manufactured in parallel to the substrate 6 by an IC technique. By varying the ratio of the transverse width W and longitudinal width L of the elements 1, 1', the elements 1, 1' can obtain outputs having the characteristic of different switch operating flux densities. Thereby, the selection and classification of elements are unnecessitated, and wiring and setting are made sufficient only by one element.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a Hall effect semiconductor integrated circuit (hereinafter simply referred to as a Hall IC) in which a Hall element, a circuit for amplifying Hall output, and the like are integrated in a single silicon substrate.

Conventionally, a switch type Hall IC using a silicon substrate generally has the configuration shown in FIG. 1. 1 is a silicon Hall element, 2 is an amplifier circuit, 3 is a Schmitt trigger circuit, 4 is an output circuit, 5 are constant voltage circuits, which are integrated within a single silicon substrate 6. 7 is a power supply (voltage Vcc) terminal, 8 and 9 are output terminals, and 10 is a GND (ground) terminal.

In this way, even conventional Hall ICs have two output terminals, or a Hall element 1, an amplifier circuit 2, and a Schmitt trigger.
The circuits 3I/''i are directly connected to each other, and the two output terminals 8 and 9 are taken out from the final output circuit 4.Therefore, although there are two output terminals 8 and 9, a single hole is connected to the magnetic field. Since the signal of element 1 is processed and divided by the circuit, output terminals 8 and 9 either have the same output, or an inverter circuit built in the output circuit 4 outputs an inverted signal. Figure 2 (a)
) (d The former output example has the output characteristics of output terminals 8 and 9 jointly. FIG. 2(b) is the latter output example, with the output characteristics of output terminal
(for example, a solid line) and the output terminal 9 (for example, a broken line) indicate that the output characteristics are simply inverted. Embodiments of the present invention will be described with reference to FIGS. 3 to 7 below.

In the embodiment shown in FIG. 3, two types of Hall elements 1 and 1' having different Hall output voltages with respect to magnetic flux densities are fabricated adjacently on the same silicon substrate 6, and each Hall element 1 and 1'
Amplifier circuit 2, 2' Schmitt trigger circuit 3 directly connected to
．． 3' and output circuit 4°4' are fabricated in parallel on the same silicon substrate 6 using IC technology. Note that 5 is a common constant voltage circuit.

The sensitivity V H/B of the silicon Hall element is expressed by the following formula (%).
) part configuration and the relationship between sensitivity VH/B and W/L (
Ta, V, B, μ are constant). As shown in the above formula and FIG. 6, the width W of the Hall element.

By changing the height-to-width ratio, the sensitivity can be changed.

Note that when W/L is α5, f H (W/L) is α9, which is almost close to 1, and when W/L is LL25 or less, f H (W/L) can be considered to be l. Under these conditions, VH/B and W/L are in a proportional relationship at L (dotted line in Figure 6), and it is relatively easy to design Hall elements with different sensitivities. But there is no problem.
′□′:″ In this way, two types of Hall elements f1.1′ with different L/W
By incorporating these, outputs with different switching magnetic flux density characteristics as shown in FIG. 4(a) or (b) can be obtained. In FIG. 4, the solid line is, for example, the output terminal 8.
, the broken line is the output of the output terminal 9.

In the embodiment shown in FIG. 7, the Hall elements 1,
1′ are exactly the same size, and a separate voltage adjustment circuit 11 is installed.
The hall elements 1 and 1' have different voltages applied thereto. The rest of the configuration is the same as that in FIG. 3. With this configuration, the sensitivity of the υ Hall elements 1, 1' changes, and similarly outputs having the characteristics shown in FIG. 4 can be obtained at the output terminals 8, 9.

In the above embodiment, the case where two output terminals are used is described, but if this method is further expanded and multiple Hall elements and attached circuits are installed in parallel as necessary, it is possible to achieve different operating magnetic flux densities. It is possible to develop a Hall IC with multi-terminal output (Jj8).

As described above, the Hall effect semiconductor integrated circuit of the present invention is effective for precision positioning control, and the Hall effect semiconductor integrated circuit of the present invention is effective for precision positioning control.
Compared to cases where devices are used side by side, there is no need to select one category of elements, and wiring.

Since only one element is required for setting, a large implementation effect can be provided.

[Brief explanation of drawings]

Figure 1 is a configuration diagram showing a conventional example, and Figure 2 (al and (bl)
3 is a diagram illustrating an example of conventional output characteristics, FIG. 3 is a configuration diagram illustrating an embodiment of the present invention, and FIG. 4 (at and (bl Ifi
Figure 5 is a diagram illustrating an example of the output characteristics of the present invention, Figure 5 is a diagram showing the configuration of the Hall element section, Figure 6 is a diagram showing the relationship between sensitivity and dimension ratio, and Figure 7 is another embodiment of the present invention. It is a configuration diagram showing an example. 1, 1'... Hall element, 2, 2'... amplifier,
3, 3'...Schmitt trigger circuit, 4, 4'...
... Output circuit, 5... Constant voltage circuit, 6... Silicon substrate, 7... Power supply terminal, 8, 9... Output terminal, 10... GND terminal, W... Width, L・・・
・Vertical width, 11... Voltage adjustment circuit. Agent Patent Attorney Aihiko Fukushi (and 2 others) 11.

Claims (1)

[Claims] 1. A Hall effect semiconductor integrated circuit 1 characterized by having a plurality of elements and circuit sections, each of which derives outputs with different operating magnetic flux density characteristics from its output terminals.