JPS58153292A - System for controlling magnetic bubble memory - Google Patents

Abstract

PURPOSE:To prevent malfunction at the time of releasing the power-on reset, by controlling the power-on reset circuit of a magnetic bubble memory circuit with a clock generator. CONSTITUTION:When the voltage (1) gradually is increased and reached a specific voltage VREF after making an input power supply, the gate of a power-on reset circuit 8 is opened and a voltage (2) is outputted. A clock generator 9 starts the operation simultaneously with the making of the power supply and outputs a clock pulse (3). Disturbed pulses at the initial stage are cut (4) by an NAND gate 13 and counted by a counter 14, and, after the number of clocks N required for making the power-on set for returning a sequencer, etc., to the initial stage is counted, a power-on reset release signal (5) is delivered, and thus, the normal operation is started. In this way, malfunction at the time of power-on is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a control system for a magnetic bubble memory that is used as a storage device for an electronic device.

(2) Background of the technology Devices using magnetic bubbles, which store information and perform logic calculations by suspending magnetic bubbles, are non-volatile, have high storage density, and have low power consumption. It is expected to have a promising future as a rounding mass memory, which has various characteristics such as being a solid-state device with extremely high reliability.

This magnetic puzzle memory element is made by engraving a thin film of magnetic garnet on a single-crystal substrate of gadolinium, gallium, and garnet using the vertical phase epitaxial growth method, and then engraving a thin film of magnetic garnet on top of the single-crystal substrate of gadolinium, gallium, and garnet. -Improve the puzzle propagation path with teeper or half disk O putter yf matrix from the thin l1lk.L bubble is generated by %O. 1 if there is
1@.

If there is no information, please store the information as @OI.
O is there. The writing and reading of information to and from this element is controlled by a magnetic paplume and a control circuit.

(m) Prior Art and Problems No. 116 is an explanation of the conventional magnetic bubble memo drop control system. In the figure, 1 is a control circuit, 2 is a power-on reset circuit, 3 is a clock generator, 4 is a sequencer, 5 is a controller, and 6 is a tarokk generator.

In the conventional control circuit shown in the 11th EK, power-on reset is canceled regardless of Vi and the clock. There is a drawback that the control circuit malfunctions due to the power-on reset being canceled and running even though the ninth clock has not been output, or the clock being output when the clock waveform is not normal or not.

(4) Object of the Invention In view of the above-mentioned conventional drawbacks, it is an object of the present invention to provide a control system for preventing malfunctions of the magnetic bubble memory control circuit during power-on reset w4#.

(5) Structure and object of the invention According to the present invention, a magnetic bubble memory including a sequencer, a controller, a CI cooler tarlock generator, a tying generator, and a power-on reset circuit for controlling a magnetic puzzle memory is provided. This is achieved by providing a magnetic bubble locking control system that prevents malfunctions during power-on by controlling the power-only output circuit with a clock generator in the control circuit.

(6) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

No. 21111 is a prisoner for explaining the magnetic puzzle memory control method according to the present invention. In the same figure, 7 is a control circuit including the following circuits, 8 is a power-on reset circuit that performs a microscopic inspection of the power supply and closes the gate when the specified voltage has been reached, 9
Bare stomach ivy generator.

10 is a sequencer, 11 is a controller, 111
is the timing generator, and the 13ti power supply voltage is higher than the specified voltage (so that the cooler and heat will come out).
The D circuit shows a round counter that counts the number of ticks required for the 14-digit power-only circuit.

3rd @I shows a tie-setting chart in the circuit of FIG. 2 and is a running interval. In the figure, ■ is the input power supply voltage, ■ is the voltage output from the power-on reset circuit, ■ is the clock output from the clock generator, ■ is the clock counted by the counter, and ■ is output from the counter to the sequencer, etc. Each shows a power-on reset signal.

Next, the magnetic puzzle memory control method of the present invention will be explained using FIGS. 2 and 3.

When the input power is turned on and the voltage () gradually rises and reaches the specified voltage Vllv, the power-on reset circuit 8
When the gate is open, the voltage is output. At the same time as the power is turned on, the clock generator 9 operates and outputs a clock pulse ■. This clock pulse (2) is turned into (2) after the initial disturbed pulse is cut off by the NAND gate 13.

The counter 14 counts this clock pulse ■,
It is necessary to perform a round power-on reset to return the sequencer 10 to the initial state 11, and after counting the number N, it sends out the power-on reset signal ■ after i. Is this a Kx sequence? Each circuit such as No. 10 is removed from the reset and can resume normal operation.

(7) Effects of the Invention As explained in detail above, the magnetic bubble memory control method of the present invention detects that the power supply has reached a normal potential,
Therefore, the power-on reset is canceled by outputting the tsuta signal and using that clock, so the power-on reset is canceled only when the tatuta is not output or the clock waveform is not normal, as in the past. Therefore, it is possible to prevent malfunctions of the control circuit, and it is highly effective in contributing to improving the reliability of the magnetic puzzle memory control circuit.

[Brief explanation of the drawing]

FIG. 1 is a rounded diagram explaining the conventional magnetic puzzle memory control method, FIG. 2 is a rounded diagram explaining the magnetic puzzle memory control method according to the first invention, and SS shows the time chart in FIG. It is between.

Claims (1)

[Claims] 1. A magnetic bubble memory control circuit including a ninth sequencer, a controller, a clock generator, a tie generator, and a bow/reset circuit for controlling a magnetic puzzle memory. A magnetic paplume control system characterized by preventing malfunction of the control circuit at power-on by controlling the power-on reset circuit with a clock generator.