JPS5815203A - Thin film resistor element - Google Patents
Thin film resistor elementInfo
- Publication number
- JPS5815203A JPS5815203A JP56113934A JP11393481A JPS5815203A JP S5815203 A JPS5815203 A JP S5815203A JP 56113934 A JP56113934 A JP 56113934A JP 11393481 A JP11393481 A JP 11393481A JP S5815203 A JPS5815203 A JP S5815203A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- film resistor
- resistor element
- trimming
- passivation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Details Of Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明は、レーザー光線等のトリミングによって抵抗値
の調整を行うように構成された薄膜抵抗体素子に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thin film resistor element whose resistance value is adjusted by trimming with a laser beam or the like.
一般に薄膜抵抗体素子においては、薄膜抵抗体を湿気、
塵埃、不純物イオンなどの外部汚゛染から保護するため
に、薄膜抵抗体上部をパッシベーション膜によって覆う
必要がある。Generally, in thin film resistor elements, the thin film resistor is exposed to moisture.
In order to protect it from external contamination such as dust and impurity ions, it is necessary to cover the upper part of the thin film resistor with a passivation film.
第１図（＾、（Ｂ）〜第６図（Ａ） 、 （Ｂ）は、こ
のような従来の薄膜抵抗体素子の各製造工程を示すもの
であり、各図の（へは薄膜抵抗体素子の断面図、各図の
（Ｂ）は薄膜抵抗体素子の上面図である。以下、各工程
を抵抗体材料としてＮｉ−Ｃｒ系合金を使用した例を基
に説明するが、他の材料、例えばＣｒ −８ｔ系合金、
サーミット系合金、もしくはＴａ系合金でもほぼ同様で
ある。Figure 1 (^, (B) - Figure 6 (A), (B) show each manufacturing process of such a conventional thin film resistor element, and ( ) of each figure shows the manufacturing process of the thin film resistor element. A cross-sectional view of the element, and (B) in each figure are top views of the thin film resistor element.Hereinafter, each process will be explained based on an example in which a Ni-Cr alloy is used as the resistor material, but other materials may also be used. , for example, Cr-8t alloy,
The same applies to thermite-based alloys or Ta-based alloys.
まず、絶縁基体１上に薄膜抵抗体２のパターンを形成し
く第１図）、この上に電極３を形成する（第２図）。つ
いで、薄膜抵抗体２と電極３とを外部汚染から保護する
ためＪｐＣ，８１０２膜もしくは窒化シリコン膜から成
るパッシベーション膜４を形成する（第３図）。First, a pattern of a thin film resistor 2 is formed on an insulating substrate 1 (FIG. 1), and an electrode 3 is formed thereon (FIG. 2). Next, a passivation film 4 made of a JpC, 8102 film or a silicon nitride film is formed to protect the thin film resistor 2 and the electrode 3 from external contamination (FIG. 3).
次に、このパッシベーション膜４の電極３に相対する部
分に窓６を設け（第４図）、プローバー等によって薄膜
抵抗体２の抵抗値を測定し、なから、レーザー光線等で
トリミング−ランド部Ｔの一部をトリミングして所望の
抵抗値となるように機能修正しく第６図）、この後パッ
ケージに組込んでいる。Next, a window 6 is provided in the part of the passivation film 4 facing the electrode 3 (FIG. 4), and the resistance value of the thin film resistor 2 is measured using a prober or the like, and then the land portion T is trimmed using a laser beam or the like. The function is modified by trimming a part of the resistor to obtain the desired resistance value (Fig. 6), and then it is assembled into a package.
しかしながら、このような従来の薄膜抵抗体素子は、上
述した製造工程からも明らかなように、レーザー光線等
を用いてトリミングを行なった部分は薄膜抵抗体２と共
に保護膜であるパッシベーション膜４をも除去するため
、外部からの汚染物質によって薄膜抵抗体２が劣化させ
られるという問題がある０ ゛
例えば、上述のようにして機能修正された薄膜抵抗体素
子を樹脂封止型パッケージに組込み、温度８０’Ｃ、相
対湿度８６％の高温・高湿試験を行なうと、その抵抗値
は第６図に示されるごとく時間と共に大きく変化し、な
かには薄膜抵抗体が断線してしまうものさえある。そし
て、この断線した薄膜抵抗体素子を調べた結果、レーザ
ー光線でトリミングが行なわれた部分の抵抗材料が消失
していた。However, as is clear from the above-mentioned manufacturing process, in such a conventional thin film resistor element, the passivation film 4, which is a protective film, is also removed along with the thin film resistor 2 in the area trimmed using a laser beam or the like. Therefore, there is a problem that the thin film resistor 2 is deteriorated by external contaminants. C. When a high temperature/high humidity test is conducted at a relative humidity of 86%, the resistance value changes greatly over time as shown in FIG. 6, and some thin film resistors even break. When the broken thin film resistor element was examined, it was found that the resistive material in the area where the laser beam had been trimmed had disappeared.
このような問題を解消するだめの方法としてはトリミン
グされた薄膜抵抗体素子を気密性の高いハーメチックシ
ールに封入するか、もしくはトリミングを中止するかで
あるが、前者の方法は、ハーメチックシールが高価なた
めにコストが上昇すると旨う問題があり、また後者の方
法では素子の精度が低く、非現実的であるという問題が
ある。The only way to solve this problem is to encapsulate the trimmed thin film resistor element in a hermetic seal with high airtightness, or to stop trimming, but the former method requires that the hermetic seal is expensive. Therefore, there is a problem that the cost increases, and the latter method has a problem that the precision of the element is low and it is unrealistic.
本発明は、このような点に鑑みて成されたものであり、
レーザー光線等でのトリミングによって所定の精度を確
保すると共に、このトリミング時にレーザー光線等で除
去されたトリミングランド部を再度窒化シリコン膜で被
覆することにより、外部汚染による劣化が完全に防止さ
れた精度の高い薄膜抵抗体素子を提供するものである。The present invention has been made in view of these points,
In addition to ensuring a certain level of precision by trimming with a laser beam, etc., the trimming land area that was removed by the laser beam, etc. during trimming is again coated with a silicon nitride film, resulting in high precision that completely prevents deterioration due to external contamination. A thin film resistor element is provided.
なお・本発明においては、パッシベーション膜としてＳ
ｉｏ２膜を用いている。Note that in the present invention, S is used as the passivation film.
It uses io2 membrane.
以下、本発明に係る薄膜抵抗体素子の一実施例を、その
製造工程と共に説明する。この実施例において、基体に
形成された薄膜抵抗体をトリミングするまでの工程は第
１１図〜第５図に示された工程とほとんど同じである。An embodiment of the thin film resistor element according to the present invention will be described below along with its manufacturing process. In this embodiment, the steps up to trimming the thin film resistor formed on the substrate are almost the same as the steps shown in FIGS. 11 to 5.
すなわち、Ｓｉ基板ＬＫ ５１０２膜を８０００人形成
した基体１に、Ｈｉ −Ｃｒ（８０：２０）合金を抵抗
体材料とする薄膜抵抗体２を真空蒸着法で基体全面に形
成し、ついで電極材料であるＡｌを用いてＨｉ−Ｃｒ合
金膜２上に電極３を形成する。次にフォトリングラフィ
を用いて、電極３と抵抗体２の所望のパターンる得る。That is, on a substrate 1 on which 8000 Si substrate LK 5102 films were formed, a thin film resistor 2 made of a Hi-Cr (80:20) alloy as a resistor material was formed on the entire surface of the substrate by vacuum evaporation, and then an electrode material was formed on the substrate 1. An electrode 3 is formed on the Hi-Cr alloy film 2 using a certain Al. Next, a desired pattern of the electrode 3 and resistor 2 is obtained using photolithography.
そして外部汚染から保護するためのＳｉＯ２パッシベー
ション膜４をスパッタ法、ＣＶＤ法、真空蒸着法等で形
成した後、再びフォトリングラフィによってＳ ｉ０２
パッシベーション膜４に窓６を形成し、外部接続に必要
な電極取出し部分を形成する。After forming an SiO2 passivation film 4 for protection from external contamination by sputtering, CVD, vacuum evaporation, etc., the SiO2 passivation film 4 is again formed by photolithography.
A window 6 is formed in the passivation film 4 to form an electrode extraction portion necessary for external connection.
そして、薄膜抵抗体２の抵抗特性および温度特性の安定
化のだめの熱処理を行なった後、電極取出し部分にプロ
ーパの探針を当てて薄膜抵抗体２の抵抗値を測定しなが
ら、レーザー光線等でトリミング・ランドＴの一部をト
リミングして所望の抵抗値となるように修正する。After heat treatment is performed to stabilize the resistance characteristics and temperature characteristics of the thin film resistor 2, the resistance value of the thin film resistor 2 is measured by placing a probe of a propper on the electrode extraction part, and trimming is performed with a laser beam or the like. - Trim a part of the land T to correct it to the desired resistance value.
以上の工程は、従来の薄膜抵抗体素子を製造する工程と
同一であるが、本発明においては前述の工程までで製作
された抵抗値修正法の薄膜抵抗体素子に対して、さらに
第７図（Ａ） 、 （Ｂ）に示したような処理を行なう
。すなわち、抵抗値が修正さ第１た薄膜抵抗体素子に、
低温プラズマＣＶＤ法によって窒化シリコン膜を５ｏｏ
ｏ人形成した後、フォトリングラフィによりリドリミン
グ・ランドＴの部分を中心に窒化シリコン膜６が残るよ
うに整形し、トリミングされた部分およびその近傍の損
傷を受けた部分の８１０２パツシベーシヨン膜を窒化シ
リコン膜で完全に覆うことに１より、外部からの汚染物
質が薄膜抵抗体に接触しないよう構成している。The above steps are the same as those for manufacturing a conventional thin film resistor element, but in the present invention, for the thin film resistor element manufactured by the resistance value correction method up to the above steps, the process shown in FIG. The processing shown in (A) and (B) is performed. That is, in the first thin film resistor element whose resistance value has been modified,
A silicon nitride film of 500 mm was deposited by low-temperature plasma CVD method.
After forming the 8102 passivation film, the silicon nitride film 6 is shaped by photolithography so that it remains around the re-trimming land T, and the 8102 passivation film in the trimmed part and the damaged part in the vicinity is covered with silicon nitride. By completely covering the thin film resistor with the film, contaminants from the outside do not come into contact with the thin film resistor.
なお、本発明において基体全面のパッシベーションを８
１０２膜にし、トリミング・ランド部に窒化シリコン膜
を用いた理由は、窒化シリコン膜はＳ １０２膜と同一
エツカ／ダ液でエツチングさｆするが、窒化シリコン膜
の方がエツチングレートが速いために、窒化シＩＪ’Ｊ
ン膜の下地の８１０２膜にはほとんど影響を与えずに整
形することができるためである。例えば、上記実施例に
おいて、スパッタ法で形成したＳ １０２膜をＨＦ ：
４ｏ％ＮＨＪ” ＝に〇の混合液でエツチングした場
合のエッチングレートは約２０１ｙ’１１ ｔａ Ｃで
あるのに対し、低温プラズマＣＶＤ法で形成した窒化シ
リコン膜を同一混合液でエツチングした場合には１００
０人／ｓｅａ以上と非常に速く、またＨＦ ： ４０％
ＮＨ４Ｆ ＝ １：３０の混合液でも窒化シリコン膜は
約２９．Ｏへ／ｓｅａと速い。このためＳ ｉ０２パッ
シベーション膜をほとんどおかすことなくトリミング・
ランド部に窒化シリコン膜を整形することができる。In addition, in the present invention, the passivation of the entire surface of the substrate is
The reason for using a silicon nitride film in the trimming land area is that the silicon nitride film is etched with the same etcher/dry solution as the S102 film, but the silicon nitride film has a faster etching rate. , nitriding IJ'J
This is because it is possible to shape the 8102 film that is the underlying film with almost no effect on the 8102 film. For example, in the above example, the S 102 film formed by sputtering was treated with HF:
The etching rate when etching with a mixed solution of 4o% NHJ is approximately 201y'11 ta C, whereas when etching a silicon nitride film formed by low temperature plasma CVD with the same mixed solution, the etching rate is approximately 201y'11 ta C. 100
Very fast with over 0 people/sea, and HF: 40%
Even with a mixed solution of NH4F = 1:30, the silicon nitride film is about 29. To O/sea and fast. Therefore, it is possible to trim and remove the Si02 passivation film without damaging it.
The silicon nitride film can be shaped on the land portion.
このようにして構成された薄膜抵抗体素子を従来例と同
様に樹脂封止型パッケージに封入して、温度８０°Ｃ２
相対湿度８６％の高温、高湿放置試験を行なった結果を
第８図に示す。The thin film resistor element constructed in this way was sealed in a resin-sealed package as in the conventional example, and the temperature was 80°C2.
Figure 8 shows the results of a high temperature and high humidity storage test at a relative humidity of 86%.
この図からも明らかなように、本発明に係る薄膜抵抗体
素子は従来の薄膜抵抗体素子に比較して、素子間におけ
るバρキも小さく、さらに抵抗変化率も非常に小さいこ
とも明らかである。As is clear from this figure, the thin film resistor element according to the present invention has a smaller variation ρ between the elements than the conventional thin film resistor element, and it is also clear that the rate of change in resistance is also very small. be.
以上、説明したように、本発明の薄膜抵抗体素子は、パ
ッシベーション材料としてＳ ｈ ０２を用い、レーザ
ー光線等で抵抗値修正のためにトリミングされた部分を
中心に窒化シリコン膜が形成されているので、素子を構
成している薄膜抵抗体が外部汚染されることがなく、信
頼性および精度の高い薄膜抵抗体素子を実現することが
可能となり、Ｌ集的に非常に有用な発明である。As explained above, the thin film resistor element of the present invention uses S h 02 as a passivation material, and a silicon nitride film is formed mainly on the part trimmed with a laser beam or the like to correct the resistance value. This is a very useful invention in general, since it is possible to realize a highly reliable and accurate thin film resistor element without external contamination of the thin film resistor constituting the element.
第１図（八、（均、第２図四、（同、第３図（八、（Ｂ
ｌ。
第４図（Ａ）、（Ｂ）および第６図（８）、（Ｂ）は従
来の薄膜抵抗体素子の製造工程を示す断面図および上面
図、第６図は従来の薄膜抵抗体素子を樹脂封止型・くソ
ケージに封入し、高温・高湿放置試験にかけた場合の抵
抗変化率を示す特性図、第７図１Ａ）、ｔＢ）は本発明
に係る薄膜抵抗体素子の製造工程の一例を説明するため
の断面図および上面図、第８図は本発明の薄膜抵抗素子
を樹脂封止型ノ（ツケージに封入し、高温・高湿放置試
験にかけた場合の抵抗変化率を示す特性図である。
１・・・・・絶縁基体、２・・・・・薄膜抵抗体、３・
・・・・電極、４・・・・・・５ｉ０２）（ツシベーシ
ョン膜、６・・・・・窓、６・・・・・・窒化シリコン
膜、Ｔ・・・・・・トリミング・ランド。
＠１ｒ１４
第４ｒ４
゜ハ、（８）
第６図
第８図
（％〕Figure 1 (8, (Unit, Figure 2 4, (same, Figure 3 (8, (B
l. 4(A), (B) and FIG. 6(8), (B) are cross-sectional views and top views showing the manufacturing process of a conventional thin film resistor element. A characteristic diagram showing the rate of change in resistance when the thin film resistor element is sealed in a resin-sealed cage and subjected to a high temperature and high humidity storage test, Figure 7, 1A) and tB), shows the manufacturing process of the thin film resistor element according to the present invention. A sectional view and a top view for explaining an example, and FIG. 8 show characteristics showing the rate of change in resistance when the thin film resistive element of the present invention is sealed in a resin-sealed cage and subjected to a high temperature and high humidity storage test. 1. Insulating base, 2. Thin film resistor, 3.
...Electrode, 4...5i02) (Tsivation film, 6...Window, 6...Silicon nitride film, T...Trimming land. @1r14 4th r4 ゜ha, (8) Figure 6 Figure 8 (%)
Claims (1)
にＳ ｘ ０２パツシベーシヨン膜を形成し、このパッ
シベーション膜に電極取出し用の窓を設け、前記薄膜抵
抗体が所望の抵抗値になるように前記薄膜抵抗体にトリ
ミングを施してなる薄膜抵抗素子において、前記薄膜抵
抗体のうち、トリミングによってパッシベーション膜が
除去された部分およびこの近傍のトリミングにより損傷
を受けた前記パッシベーション膜を窒化シリコン膜で被
覆してなることを特徴とする薄膜抵抗体素子。An S x 02 passivation film is formed on the surface of the thin film resistor and electrode portion formed on the insulating substrate, and a window for taking out the electrode is provided in this passivation film so that the thin film resistor has a desired resistance value. In a thin film resistance element formed by trimming the thin film resistor, a portion of the thin film resistor from which the passivation film has been removed by trimming and the passivation film damaged by trimming in the vicinity thereof are covered with a silicon nitride film. A thin film resistor element characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56113934A JPS5815203A (en) | 1981-07-20 | 1981-07-20 | Thin film resistor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56113934A JPS5815203A (en) | 1981-07-20 | 1981-07-20 | Thin film resistor element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5815203A true JPS5815203A (en) | 1983-01-28 |
| JPS6310881B2 JPS6310881B2 (en) | 1988-03-10 |
Family
ID=14624852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56113934A Granted JPS5815203A (en) | 1981-07-20 | 1981-07-20 | Thin film resistor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5815203A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58176220A (en) * | 1982-04-09 | 1983-10-15 | Fukuda Kinzoku Hakufun Kogyo Kk | Production of conductive plastic |
| JPS61195458A (en) * | 1985-02-25 | 1986-08-29 | Fujitsu Ltd | Telegram transmission and reception control method |
-
1981
- 1981-07-20 JP JP56113934A patent/JPS5815203A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58176220A (en) * | 1982-04-09 | 1983-10-15 | Fukuda Kinzoku Hakufun Kogyo Kk | Production of conductive plastic |
| JPS6054967B2 (en) * | 1982-04-09 | 1985-12-03 | 福田金属箔粉工業株式会社 | Method of manufacturing conductive plastic |
| JPS61195458A (en) * | 1985-02-25 | 1986-08-29 | Fujitsu Ltd | Telegram transmission and reception control method |
| JPH0452997B2 (en) * | 1985-02-25 | 1992-08-25 | Fujitsu Ltd |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6310881B2 (en) | 1988-03-10 |
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