JPS58151675A - Two-dimensional high speed fourier conversion processing method - Google Patents

Abstract

PURPOSE:To shorten a processing time, by absorbing an overflow portion of a data applied with one-dimensional Fourier conversion due to limitation of memory capacity, into the processing time of a Fourier conversion processor by an external memory synchronizing control device, and restoring it in an external memory. CONSTITUTION:From a a magnetic tape device 38 of a two-dimensional Fourier conversion (FFT) processing device 40, a part of an FFT unfinished data is stored in an input buffer 50, and in accordance with its data, the processing is executed by an FFT processor 56 and a rearranging device 58. An effective part of this processed one-dimensional FFT finished data is stored in a one-dimensional FFT finished storage buffer 52, and also in an output buffer 54, an overflow part of the one-dimensional FFT finished data is stored. The data of the overflow part stored in this buffer 54 is transferred to an external memory device 62, taking prescribed synchronization by an external synchronization control device 60. Also, the effective part of the one-dimensional FFT finished data stored in the buffer 52 is applied with two-dimensional FFT-prodession by the processor 56, and is stored in an external memory 36 through the buffer 54.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a two-dimensional fast Fourier transform processing method, and is particularly suitable for performing one-dimensional Fourier transform processing on two-dimensional data in the valley dimension direction to obtain two-dimensional Fourier transformed data. This paper relates to a two-dimensional business fortune Fourier transform processing method.

Conventionally, fast Fourier transform (FFT) processing methods have been widely used as a means of signal analysis in many fields. , is used in the surrounding area. FIG. 1 is an explanatory diagram showing an example of applying the conventional one-dimensional FFT processing power method to image processing. In this way, in the example shown in FIG. 1, a signal 100 is obtained by performing one-dimensional FFTd on an image 2, this signal 100 is subjected to predetermined processing 6 to form a signal 102, and then an inverse FFT is performed. 8
The image output 10 is received through the . To perform the processing shown in FIG. 1, a part of the image data 2 is extracted as shown in FIG. However, the buffer required for -dimensional FFT processing may have a storage capacity that can store part of the image data 2 as shown in the figure.

On the other hand, in the conventional two-dimensional FEi"T processing method, as shown in FIG. (device) 16, and performs vertical FFT processing (reference numeral 18) on the horizontal FFT data re-outputted from this storage device 16, or As shown in Figure 4, all data in the lateral direction is once subjected to FFT processing 20, and all the data that can be stored in the buffer 22 is extracted from a portion 20A of the lateral force direction FFT processed data. 1 is written in the buffer 22, and the vertical direction F F is applied to the stored FFT-processed data.
The T process 24 is performed.

Furthermore, according to the vP theory, the conventional two-dimensional FFT processing method is
As mentioned above, this has been achieved by performing one-dimensional FFT in both directions, but a huge amount of processing data (image data in the main) is transferred to the main memory device (in this case, the core memory).
It was not possible to store all the information on the top, and the process was divided according to the memory capacity. Therefore, the divided one-dimensional FFT-processed data must be continuously rearranged and stored in two-dimensional direction. etc.), but because the two-dimensional continuous data is divided, the number of data transfers becomes enormous.
This method has the drawback of increasing processing time. Furthermore, -dimension F
The FT-completed data is not stored in the external memory device again.
As shown in the figure, depending on the memory capacity (memory capacity of the buffer 22), there is a method of storing data continuously in two dimensions as much as possible in the high-speed main memory (buffer 22) and discarding the overflow. , although it reduces the time spent transferring data by re-storing it to an external memory device, FFT
The disadvantage was that the number of times the process had to be carried out increased. FIG. 5 is an explanatory diagram for explaining the processing method of FIG. 4 in full detail. In FIG. 5, for 2°×24 FFT unerased data stored in the low-speed large-capacity external memory device 20, the input buffer 22 consisting of a high-speed main memory and the storage buffer 26 that has undergone Due to the constraints, FFT is performed for 1 to 2n in the X direction at the first time and continuously for 1 to 2' in the X direction, and the results are held in the input buffer 22. Similarly, n and m are arbitrary numbers, and in this case, an example when n=In will be explained.

Here, if the number of processing divisions is N, the relationship between n and i is as follows: n=1XN (1). Then, the FFT-completed data (X
The direction is 1~2'', the X direction is 1~21), the X direction is 11i''
Due to the memory constraints of the FT storage buffer 26, 1 to 2j in the X direction on the buffer 22 are arranged as valid parts in the X direction on the storage buffer 26, and the F'FT storage buffer 26 in the X direction is It is held in area AR.

At this time, 21+1 to 2'' of the buffer 22 in the X direction is subjected to FFT processing, and the effective part is stored in the area AR3 on the storage buffer 26. This is repeated N times, and
The data up to 2j are continuous in the X direction (area A, ~ A)
), are held in the X-direction FFT-completed storage buffer 26.

The FFT-completed data held in this storage buffer 26 (
-dimensional FFT-processed data) in the X direction, the two-dimensional FFT-processed data is obtained by 1/M of the total processed data. Note that N and M can be arbitrary numbers, and in this case, N=M will be explained. This process is performed sequentially on the effective part on the input cover sofa from 2j to 2''j,
22 J +1~2 A I , ,...2 (N
-1) The entire process is completed by moving 141 to 2 m and repeating N times. By the way, 2°X
Let T be the time to perform one-dimensional F'FT processing on 2 m of data. This procedure (i.e., one-dimensional processing of all data in the X direction, and data stored in the storage buffer 26 in the X direction) The procedure for one-dimensional 11i"FT is N times in the X direction and once in the X direction.
(2) It takes time. Theoretically, assuming that the high-speed main memory capacity is infinite, if one-dimensional FFT is performed 61 times in each of the X and X directions, then the -dimensional FF'T' processing (-
Since the dimensions are set in the X and X directions, the result is two dimensions), fN1 is 2×T, (3), and this time is the minimum processing time. In other words, this means that N-1 extra F
This means that you are performing FT.

Therefore, when considering the performance of actual equipment, the amount of processing data is several tens to 100 (Mb3'te), and the high-speed main memory capacity is several hundred (Mt) yte) to 1 (Mb3'te).
le), the number of divisions N would be about 100, but this would take more than the theoretical minimum processing time of 50@, which had the drawback of being impractical.

SUMMARY OF THE INVENTION An object of the present invention is to provide a two-dimensional fast Fourier transform processing method that eliminates the drawbacks of the prior art and performs fast and efficient FFT processing at a low cost.

In order to achieve the above object, the present invention performs a two-dimensional 11i"FT on the effective part of the -dimensional FFT f-t, and -
The overflow part of the dimensional F'FT-completed data is stored again in a low-speed external large-capacity memory device at high speed, and when performing two-dimensional FFT on the corresponding part of the data, it is stored in the primary data from the low-speed external large-capacity memory device. This is an arrangement in which the overflow portion of the original Fl''T-completed data is effectively used.

Hereinafter, one embodiment of the present invention will be described based on the drawings.

Figure 6 shows 2D II! 'F'l' T processing bag to which the F T processing method is applied +1. FIG. 1 is a block diagram showing an image processing device incorporating a. The image processing device 30 includes a central processing unit 32 that performs overall control and arithmetic processing, a high-speed main memory device 34 such as a core memory for programs and data buffers that control its operations, and a disk that stores data. Large-capacity external memory device 3 such as a drum or
6, a magnetic tape device 38 for inputting uncorrected image data or outputting corrected image data, and an uncorrected 1Ik
l'1fJ1. A two-dimensional FFT processing device [40] that performs two-dimensional F'li"T processing on the data; an image processing processor 42 that performs the necessary processing 'f!: on the image data after F'FT; These devices are connected to a display wave @ 44 that displays image data subjected to inverse FFT from image data, or unprocessed or partially processed image data, and a photo printer 46 for obtaining a hard copy of the image. do·
4B.

According to this image source processing device [1t30, the magnetic tape device 3
The uncorrected image data is input from 8, and the two-dimensional FFT processing device 40 performs noise removal (
After Fourier transformation, smoothing)′f: After performing l[!
The l11M processing processor 42 performs image correction and the like. Once the predetermined correction has been completed, the photoprinter 46 prints out the image data or outputs the corrected image data to the magnetic tape device 38. The reason for such processing is, for example, that satellite images generally have P
CM (p 1use Code Modula t I
on) Coherent noise due to thread clock leakage is often included in a superimposed manner, so the objective is to remove the noise and improve the quality of the image.

FIG. 7 shows a two-dimensional F F T to which the method of the present invention is applied.
FIG. 9 is a block diagram showing an embodiment of the processing device. In the embodiment shown in this figure, the same elements as those in the embodiment shown in FIG. In the figure, the central processing unit 32 controls data transfer, each chunk buffer 50, 52 and 54, and a low-speed large-capacity external memory 3.
6 and 38 as external memory controllers; address control executed via 755, FFT processor 56. It performs interrupt control for starting and ending execution of the sorting device 58 and external memory synchronization control device 60. Further, the central processing unit 32 is configured to control an external memory device 62 that stores the -dimensional FFT data via an external memory controller 64.

Further, the two-dimensional FFT processing device 40 transfers a portion of the FFT-unfinished data from the external memory device 38 to an input buffer 50.
Based on this stored unfinished data, an FFT processor 56 performs FFT processing in the X direction, for example, and supplies the data to a sorting device 58, which rearranges the data from the X direction to the X direction. The effective part of the rearranged one-dimensional FFT data is converted into one-dimensional F
``F'T completed (10)'' is stored in the storage buffer 52, and at the same time, the output buffer 54 stores the data (corresponding to the conventional discard section) of the rearranged one-dimensional FF'T completed data. The high part of the one-dimensional F'FT-completed data stored in the output buffer 54 is transferred to the external memory device 62 while maintaining predetermined synchronization by the external memory synchronization opening side l device 60, and -dimensional F'FT-completed data is transferred to the external memory device 62 while maintaining a predetermined synchronization. All seven effective parts of the one-dimensional FFT-completed data stored in the storage buffer 52 are further processed by the FFT processor 56 for two-dimensional F'F'T processing (one-dimensional F'F' in the X direction).
T processing) is performed and recorded in the output buffer 54, and this is stored in the external memory device 36 as two-dimensional FFT-completed data.

The operation of the two-dimensional FF''T processing apparatus configured as described above will be explained with reference to the flowchart shown in FIG. 8 and the time chart shown in FIG. 9.

The central processing unit 32 issues a command to start transferring data to the external memory controller 55 (step 200), and the DM is sent from the external large capacity memory device 38 (step 201).
A (Direct Memory Access) (11) Through the transfer, FFT unfinished data of an amount corresponding to the memory capacity 1' of the input buffer 50 is transferred (step 202) (time t, ~'s). Upon completion of the transfer, the unfinished data is transferred from the input buffer 50 to P fi' T
The F'F'T processor 56 executes FFT-k in the -dimensional direction on all data in the input buffer 50 (step 203) (at time t).
, starting from ). One-dimensional FFT-completed data (for example, data in the X direction) from this FFT processor 56 is sequentially processed in a two-dimensional direction (for example, y direction) is continuously performed (step 205) (starting from time t), and depending on the memory capacity, one-dimensional FFT of the -dimensional FFT data is performed.
stored in the completed storage buffer 52 (step 206, 2
07) (predetermined time from time t), and -dimension F
The overflow portion of the FT-completed data is stored in the output buffer 54 (step 210) (for a predetermined period of time starting from time N). (12) Since the input buffer 50 is equipped with a double buffer, it is possible to read the next data during the execution of FFT, and the free time ki of the FFT processor 56 can be reduced. '6 + t7 to start reading into the input buffer 50).

On the other hand, the one-dimensional F F T stored in the output Balanoa 54
A part of the completed data is partially rearranged continuously according to the amount of division in the two-dimensional direction, but this output buffer 5
4 is transferred to the external memory device 62 at high speed by DMA transfer (step 211) (at time 1.4).
(for the following specified time).

Then, if it is not FFT processing (step (212))
, the process returns to step 206. In addition, in order to increase the transfer speed, it is necessary to solve the problems in the two-dimensional direction 8! part, one
By passing the data for the overflow 6 through the external memory synchronization control device 60, it becomes possible to transfer the data at the same timing as when all the data for the two-dimensional inner portion are transferred continuously. Repeat these processes (step 2)
07゜(13) 208 and 209), when all the data for the divided capacity in the two-dimensional continuous flesh portion is stored in the -dimensional F fi "T completed storage buffer 52 (step 208) (time t□
), the processing of the buffer 52 is set to completion in step 213, the data from the storage buffer 52 is taken into the 'tFF'T processor 56 (step 214), and the processor 56 executes FF'T in the two-dimensional direction, (
Step 203) is directly stored in the output buffer 54 without reordering (Steps 204, 215, 21
6) (Time '24 + 't5 + 't'
l). During this period (a predetermined time from time '2?), the overflow one-dimensional FFT data stored in the external memory device 62 is transferred to the input buffer 50 (step 217) (time '2fl+ttlL as described above). Next, perform F'F'T in the one-dimensional direction on the OFF'T data from the human buffer 50 (step 203).
, 204゜217) (time '2G), the result is stored in the output buffer 54 which has a double buffer configuration. At time '4o), the two-dimensional F'F'T completed data is transferred to the external memory (14) and the storage device 1t36. Transfer (Steps 215, 216° 219) (Time '+101°) If the two-dimensional FFT processing has not been completed for the entire screen, proceed to Step 22.
The end counters are reset to 0 and the FFT processing is then performed. Here, the amount of overflow data stored in the output buffer 54 that can be stored in the external memory device 62 is within the range that can be stored in the external memory device 12 within the execution time of the FFT processor 56. If not all of the data are stored in the external memory device 62, it is necessary to perform the FFT again from the external memory device 38. Then, it is recorded in the external memory device 38.
It is necessary to repeat the two-dimensional FFT on all the data that has been processed until the entire two-dimensional FFT is completed.

Furthermore, to explain with reference to FIG. 9, here F'
An overview of the fact that when the free time of the FFT processor 56 is kept to a minimum, the ratio of the FFT execution time to the time for storing data in the external memory device 62 determines which songs can be re-stored has already been explained. explained. Assuming that image data pixels are represented by l (bytes) (15) 'C, the execution speed of FFT is currently about 1 to 10 (ble/consult 1), and the amount of data stored in the external memory device 62 is low. Transfer speed is 1000-5000
(byte /"'aG) Considering the fact that the amount of image data to be transferred is 1 to several tens of times the amount of FFT processing. In addition, the symbols D, . In addition, the symbols gF1 and F indicate the number of divisions in the two-dimensional direction (y direction).I!"I + f! '! This is clear from the fact that the two-dimensional FFT processing of all data is completed when the number of characters reaches M (see FIG. 5).

By doing this, a processing speed of 2 times higher can be achieved compared to the method of discarding the overflow, and the speed ratio of FFT processing can be improved.

In reality, the amount of data transferred to the external memory device 62 is
Since the processing amount of FFT is several 10 times, it is possible to perform 10 times or more.

FIG. 10 is an explanatory diagram showing a general format when -dimensional FFT-completed data in the storage buffer 52 in the embodiment of the commercial main memory device 12 is stored in the external memory device 1162. No. 111 is a time chart showing the timing during data transfer between the external memory synchronization control device 60 and the external memory device 62 for high-speed storage, where the horizontal axis represents time t and the vertical axis represents the external memory device. 12 and the processing of the external memory synchronization control device 10. In FIG. 9, due to the limited capacity of the high-speed main memory device (storage buffer 52 in this embodiment), the -dimensional FFT-completed data has only divided portions that are continuous in the two-dimensional direction (horizontal direction in the figure), that is, ,
For example, it is continuous from 1 to N times. Therefore, when FFT processing is performed by dividing the FFT-unfinished data into N parts, the data is transferred δ once every N times. If the transfer is performed by specifying the fill-in start address each time, the number of transfers will increase and the access time of the external memory device 12 will become enormous. Therefore, focusing on the fact that the data transfer cycle is N, as shown in FIG.
, ), the part where data does not exist due to unprocessed data is synchronized with the rotation of the external memory device (time IR), and when the next pledged address is reached (when the next time tW is reached) The data transfer is performed at the timing when data is written to the external memory device 12. With this arrangement, by simply specifying the start address in the external memory device 12 once at the start of DMA transfer, the data transfer can be performed without causing an apparently continuous data transfer sound or destroying the previously written data. Furthermore, since the rotation synchronization waiting time tR is constant depending on the number of divisions N, it is easy to obtain the value of the time IR by setting the timing before starting the FFT process, and as shown in FIG. The timing is easily achievable.

FIG. 12 is a block diagram showing an example of the configuration of the external memory synchronous control device. In the embodiment shown in this figure,
Components that are the same as those shown in FIG. 7 are designated by the same reference numerals and their explanations will be omitted. In the figure (18), the time count initial setting register 66 has a predetermined time count initial setting 11m'!
It is possible to set i= and supply that value to the time counter 68. The time counter 68 is configured to count against the set value and output signals 130 and 140 when the count value reaches the set value. The external memory output clock signal generator 70 that takes in this output signal 130 is connected to the external memory device 6.
2, the gate 72 is opened at a predetermined timing, and the data from the output buffer 54 is stored in the external memory device 62.

- An external memory write status signal generator 74 that captures the force output signal 140 is configured to generate and provide a signal to the external memory controller 64 for synchronizing the rotation of the external memory device 62 .

The entire operation of the external memory synchronization control device 60 configured as described above will be briefly explained below.

F” FT processing start time count setting register (19
) The time counter 68 sets the time count to the initial time counter 68, and when the time counter 68 becomes equal to the set initial value, it outputs the signals 130 and 140 to output the external memory output clock signal generator 70 and the external memory write status. The signal generator 74 is supplied with a timing signal 150' that synchronizes with the rotation of the external memory device w62 as shown in FIG. 10, and also generates a predetermined signal 160 for opening and closing the gate 72.

FIG. 13 is a graph showing a comparison of the execution times of the present processing method and the method that uses only the main memory capacity data. In this figure, the horizontal axis represents the ratio of total processing data to high-speed memory capacity, and the vertical axis represents the two-dimensional FF'T execution time. Also, the ideal time 'T
ID is the case where one-dimensional F'FT is executed kZ times on all data, and this is set as 1. In the figure, L- indicates a V-bell for which a high-speed main memory device is difficult in terms of cost, and T indicates a curve in the case of a method that discards data due to high memory capacity.On the other hand, T3. and T2. is a book (2
0) shows the processing time curve when using the li' F T processing device according to the invention, and T11 is the external memory device 62.
If the amount of FFT processing is 1:1 with respect to the amount of data transferred to T2. shows a case where the amount of F'FT processing is 2:1 with respect to the amount of data transferred to the external memory device 62.

As can be understood from this figure, this embodiment is very effective within the capacity of a high-speed main memory device that can be implemented.

From the above description, the following can be said about the embodiments of the present invention.

b) -Dimension F'FT due to the limitation of main memory capacity
The overflow of processed data is absorbed into the processing time of the FFT processor by an external memory synchronization control device, and is then stored again in the external memory device 62.

1) The processing time was compared to that in which the present invention was not applied.
It becomes possible to speed up the process by approximately 0 times.

C) Furthermore, as a means to achieve high speed, the aim is to keep the increase in main memory capacity within a cost-effective range (21), so cost performance is at a premium.

As described above, according to the present invention, it is possible to achieve high-speed and efficient FFT processing at a low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the processing flow of conventional one-dimensional FF'T, FIG. 2 is an explanatory diagram showing the relationship between buffer capacities used in conventional one-dimensional FF'T processing, and FIG. An explanatory diagram showing the principle structure of dimensional FFT processing, FIG. 4 is an explanatory diagram showing the principle structure of another conventional two-dimensional FFT process,
FIG. 5 is a block diagram shown to explain the operation of FIG. 4, and FIG. 6 shows the overall configuration of an image processing device in which a device for use in the two-dimensional FFT processing method according to the present invention is incorporated. The block diagram, FIG. 7, is a two-dimensional P P according to the present invention.
A block diagram showing an embodiment of an apparatus to which the T processing power method is applied, FIG. 8 is a flowchart shown to explain the operation of this embodiment, and FIG. 9 is a flowchart shown to explain the entire operation of this embodiment. (22) FIG. 10 is an explanatory diagram showing the format of data written to the external memory device used in this embodiment, and FIG. 11 is a time chart showing the timing of the external memory device and the external memory synchronization control device. 12 is a block diagram showing a specific configuration example of the external memory synchronization side @1 device used in this practical example, and FIG. 13 shows the execution time of the embodiment according to the present invention, when this embodiment is not applied. It is a characteristic diagram shown together with an example. 32... Central processing unit, 34... High-speed main memory device, 36... External memory device, 38... Magnetic tape device (external memory device), 40... Two-dimensional F'FT processing device, 50... Input buffer, 52... -Dimension F routed storage buffer, 54... Output buffer, 56
...PFT processor, 58... Reordering device, 6o... External memory synchronization control device, 62... External memory device. (23) Certain Figure 1, Figure 31, I-74, Figure 2,

Claims (1)

[Claims] 1. In a two-dimensional fast Fourier transform processing method in which two-dimensional data is subjected to one-dimensional Fourier transform 1 in each dimension direction to obtain two-dimensional Fourier-transformed data, a predetermined amount of the two-dimensional data is taken and one-dimensional Fourier transform is performed. After the conversion, the effective part of the rearranged one-dimensional data is further subjected to one-dimensional Fourier transform to obtain two-dimensional Fourier transformed data, and the overflow part of the rearranged one-dimensional Fourier transformed data is stored in an external memory. When storing data in the device and performing two-dimensional Fourier transform on the data corresponding to the part, the overflow portion of the one-dimensional Fourier-transformed data from the external memory device is one-dimensionally Fourier-transformed to obtain two-dimensional Fourier-transformed data. A two-dimensional fast Fourier transform processing method characterized by obtaining.