JPS58151269A - Digital printer control system - Google Patents

Digital printer control system

Info

Publication number
JPS58151269A
JPS58151269A JP3239682A JP3239682A JPS58151269A JP S58151269 A JPS58151269 A JP S58151269A JP 3239682 A JP3239682 A JP 3239682A JP 3239682 A JP3239682 A JP 3239682A JP S58151269 A JPS58151269 A JP S58151269A
Authority
JP
Japan
Prior art keywords
printing
register circuit
circuit
print
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3239682A
Other languages
Japanese (ja)
Inventor
Toshimitsu Sasaki
俊光 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NIPPO TSUSHIN KOGYO KK
Original Assignee
NIPPO TSUSHIN KOGYO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NIPPO TSUSHIN KOGYO KK filed Critical NIPPO TSUSHIN KOGYO KK
Priority to JP3239682A priority Critical patent/JPS58151269A/en
Publication of JPS58151269A publication Critical patent/JPS58151269A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K15/00Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
    • G06K15/02Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
    • G06K15/06Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by type-wheel printers
    • G06K15/07Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by type-wheel printers by continuously-rotating-type-wheel printers, e.g. rotating-type-drum printers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Record Information Processing For Printing (AREA)

Abstract

PURPOSE:To obtain the titled system which can be made to be compact, light weight, and inexpensive, by providing two register circuits which determine whether printing is performed or not based on signals of registers whose number corresponds to the number of the digits of a printing drum, and alternately operating or transferring the register circuits. CONSTITUTION:The register circuits A and B determine whether the printing is performed or not based on the signals of the registers whose number corresponds to the number of the digits of the printing drum. Said registers are alternately operated and the time for writing information is delayed. The time period between a printing timing signal and a printing timing signal is made to be a time period for rewriting printing data from other devices. Thus the occupation of the processing time is released, and the simple, compact, inexpensive digital printer control circuit is obtained.

Description

【発明の詳細な説明】 本発明はデジタルプリンタ制御に係り、特に印字データ
の書き替え時間の頬いデジタルプリンタを2つのレジス
タを使った制御方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to digital printer control, and more particularly to a control method using two registers for a digital printer that reduces print data rewriting time.

゛従来のデジタルプリンタ制御回路のブロック図を第1
図に示す。但し、デジタルプリンタは16桁であるが、
1桁目、16桁目回路を示し同様々回路の2桁目から1
5桁目の制御回路は省略しである。
゛The first block diagram of a conventional digital printer control circuit is
As shown in the figure. However, digital printers have 16 digits,
The 1st and 16th digits indicate the circuit, and the 2nd to 1st digits of the same circuit.
The control circuit in the fifth digit is omitted.

他装置から端子TIを介してls信号を受け、モータ駆
動回路1を制御し、プリンタのモータ2を回転させる。
It receives an ls signal from another device via a terminal TI, controls a motor drive circuit 1, and rotates a motor 2 of the printer.

また、レジスタ回路3に印字1行分の印字データを8%
Cr)コードで他装置より端子T2を介し書き込む。印
字ドラムが2回転したことで印字制御回路4が起動し、
プリンタより端子TP及びRPを介し送られてくるTP
倍信号 RP信号をコード変換回路5でB、CDコード
に変換し、印字制御回路4へ印字ドラム位首情報を転送
する。
In addition, 8% of the print data for one line of printing is stored in the register circuit 3.
Cr) code from another device via terminal T2. When the printing drum rotates twice, the printing control circuit 4 is activated.
TP sent from the printer via terminals TP and RP
The double signal RP signal is converted into B and CD codes by the code conversion circuit 5, and the print drum position information is transferred to the print control circuit 4.

印字制御回路4はコード変換出力と、レジスタ回路3の
出力を照合し、一致したものを印字制御回#64から論
理レベル1を出力し、ナンド回路6,7に転送する。ま
たコード変換回路5の出力の信号Aの論理レベル1の間
、ナン゛ド回路6.iの出力は論理レベルOとなり印字
ハンマー用ソレノイドに通電され、印字ハンマーが動作
するようになっている。
The print control circuit 4 compares the code conversion output with the output of the register circuit 3, and outputs a logical level 1 from the print control circuit #64 if they match, and transfers the output to the NAND circuits 6 and 7. Further, while the signal A output from the code conversion circuit 5 is at logic level 1, the NAND circuit 6. The output of i becomes a logic level O, and the print hammer solenoid is energized to operate the print hammer.

従って回路はレジスタ回路3、印字制御回路4、コード
変換回路5によって構成されており、複軸かつ数多くの
部品を使用1.ているため装置が大きくたるばかりか価
格も高くなる上に故障が多い等の次点があった。
Therefore, the circuit is composed of a register circuit 3, a print control circuit 4, and a code conversion circuit 5, and uses multiple axes and many components.1. Because of this, the equipment was not only large and expensive, but also had many failures.

本発明は印字タイミング信号及び印字開始信号の検出に
他装置が占有されることなく判別を可能にし、印字ドラ
ム1行分のデータを格納するレジスタ回路を設けてシン
プルで小形かつ安価なデジタルプリンタ制御回路をS供
するにある。
The present invention makes it possible to detect print timing signals and print start signals without occupying other devices, and provides simple, compact, and inexpensive digital printer control by providing a register circuit that stores data for one line of the print drum. To provide the circuit.

また従来、他装置がデジタルプリンタを複雛な制御回路
を用いてしか制御できなかったのけ、デジタルプリンタ
より出力される印字タイミング信号のパルス幅が0Bq
nSと短時間のため印字タイミング信号の検出及び印字
データの書き替えに、他装置の処理が占有されるからで
ある。印字タイミンク信号の周期は16m5と長く、印
字タイミング信号から印字タイミング信号間を他装置か
らの印・している。j7かし、印字タイミング信号間は
タイプハンマ動勢ソレノイド通電時間なので、今(ロ)
印字するデータはすでに通電中であり、この間に次回印
字するデータを蓄積しなければならない。よって今(ロ
)印字するデータを蓄積する回路(印字レジスタ回路)
及び次回印字するデー々を蓄積する回路(バッファレジ
スタ回路)の2つが必要である。この2つのレジスタ回
路の接続方法で以下の回路、バッファレジスタ回路とし
て動作させる方式。
In addition, conventionally, other devices could only control digital printers using complex control circuits, but the pulse width of the print timing signal output from the digital printer was 0Bq.
This is because the detection of the print timing signal and the rewriting of the print data occupy the processing of other devices because the time is as short as nS. The period of the print timing signal is as long as 16 m5, and the period between the print timing signals is used for printing from other devices. j7 However, the period between the print timing signals is the type hammer activation solenoid energization time, so now (b)
The data to be printed is already being energized, and during this time the data to be printed next time must be accumulated. Therefore, now (b) a circuit that accumulates the data to be printed (print register circuit)
and a circuit (buffer register circuit) for accumulating data to be printed next time. By connecting these two register circuits, the following circuit operates as a buffer register circuit.

(2)バッファレジスタ回路と、印字レジスタ回路を直
列接続し、印字タイミング信号でバッファレジスタ回路
から印字レジスタ回路に転送し印字する方式。
(2) A method in which a buffer register circuit and a print register circuit are connected in series, and a print timing signal is transferred from the buffer register circuit to the print register circuit for printing.

以下本発明を図に示す実施例によって具体的に綾明する
The present invention will be explained in detail below with reference to embodiments shown in the drawings.

第2図は本発明による2つのレジスタ回路の出力を交互
に使用するデジタルプリンタの制御方式のブロック図で
ある。!3図は本発明によるデジタルプリンタの印字ド
ラム展開図であり、13行。
FIG. 2 is a block diagram of a control system for a digital printer that alternately uses the outputs of two register circuits according to the present invention. ! Figure 3 is an exploded view of the print drum of the digital printer according to the present invention, with 13 lines.

16桁の例を示す。筺4図は本発明によるテジタルブリ
ン々より出力されるタイミングチャート図であり、印字
ドラム位置信号のTP倍信号 T?P信号、波V/変変
目回路り出力される信号A、R,Cのタイミングチャー
トである。−jたR、P信号は筑3図の印字ドラムの1
3行目から1行目の遷移域が印字ハンマーを連通する時
に出力される信号であり、TP倍信号印字ドラム各行の
遷移謔が印字ハンマーを涌鍋する時に出力される。篤4
図の信号A。
An example of 16 digits is shown. Figure 4 is a timing chart output from the digital printer according to the present invention, which is a TP multiplied signal T? of the print drum position signal. It is a timing chart of signals A, R, and C output from the P signal and the wave V/change circuit. -j The R and P signals are from the print drum 1 shown in Figure 3.
The transition area from the 3rd line to the 1st line is a signal that is output when the printing hammer is communicated, and the TP double signal signal is output when the transition area of each line of the printing drum is outputted when the printing hammer is connected. Atsushi 4
Signal A in the figure.

R,Cけドラム位置信号から波形変換したもので信号A
は印字ハンマー用ソレノイド違電タイミンクで通電時間
は斜線部で示す。信号Bは他装置に送出する信号で、印
字ドラム1行目のデータ送出タイミンクである。信号C
は他装置に送出する信号で印字ドラム2行目から13行
目までのデータ送出タイミングを示すものである。他装
置は、信号Bを受信後、信号Cの論理レベル変化回数に
より4臂目のデータ送出クイミンクかを判定する。
Signal A is the waveform converted from the R and C drum position signals.
is the printing hammer solenoid timing, and the energization time is shown in the shaded area. Signal B is a signal sent to other devices, and is the timing for sending data on the first line of the print drum. Signal C
is a signal sent to other devices and indicates the data sending timing from the 2nd line to the 13th line of the print drum. After receiving signal B, the other device determines whether the fourth arm is transmitting data based on the number of times the logic level of signal C changes.

いま第2図を用いてデジタルプリンタ制御方式の動作に
ついて説明する。他装置より端子T2を介し、16ビツ
ト印字データと共に端子T4.端子T3を介し7クロツ
ク信−MA 、Rをレジスタ回路A。
The operation of the digital printer control system will now be explained using FIG. 16-bit print data is sent to terminal T4. from another device via terminal T2. 7 clock signals -MA, R to register circuit A through terminal T3.

BK16ビツト全て論理レベル0を転送し、レジスタ回
路を初期設宇する。レジスタ回路は、16ビツトラッチ
回路から膚ねまり16ビツトは印字ハンマー用ソレノイ
ド対応にあり、論理レベル1け印字ハンマー動作、論理
レベル0け印字ハンマー不動作の情報である。次に他装
置より端子T1を介し、モータ駆動回路に起動をかは、
プリンや用モータを(ロ)転させる。モーフ回転により
印字ドラムが回転し、プリンタよりTP倍信号P信号が
送出される。TP、RP何号により波形変換回路より信
号A1B%Cが出力され、他装置に端子T5、T6を介
し、転送する。他装置は、信号Bを2回受信した時にモ
ータが宇状回転になったことを判定し、3回目にはドラ
ムの1行目のデータ16ビツト及びクロックA信号をレ
ジスタ回路Aに転送する。レジス夕回路Aの出力は3人
力ナンド回路8,9に転送されるが、信号Cが論理レベ
ル0であるので3人力ナンド回路8,9の出力が論理レ
ベル1となり、アンド回路1(1、11の出力が論理レ
ベル1で印字ハンマー用ソレノイドにけ通is’+、な
い。筑2図は1行目、166行目印字ハンマー用ソレノ
イド涌電回路を示12.2桁から155行目回路は省略
しである。印字ドラムが1行目に遷鴛したとき、信号C
け論理レベル1となり、レジスタ回路Aの出力が論理レ
ベル1の場合、波形変換回路出力の信号^ ・の論理レ
ベル1の間3人力ナンド回路8,9の出−力が論理レベ
ル0と=h アンド回路10 、11の出力が論理レベ
ル0となり 印字ハンマー用ソレノイドに通電印字を行
う。 た他装置は信号Cの論理レベル0から1への変−
により、印字ドラム2行目のデータ16ビツトとクロッ
クBをレジスタ回@Bに転送する。レジスタ回路Bの出
力は3人力ナンド回路12 、13に転送されるが、信
号Cがインバータ回路14により一理レベルが反転し、
0となり3人力ナンド回路12 、13の出力は論理レ
ベル1となり、印字ハンマー用ソレノイドには通電せず
・、レジスタ回路1路Aの出力による印字)\ンマー用
ソレノイドを通電する。印字ドラムが2行目に遷移1、
た時、信号Cが論理レベル0となり、インバータ回路1
4を介し論理レベル1となり、レジスタ回路Bの出力が
論理レベル1の場合、信号Aの論理レベル1の間3人力
ナンド回路12 、 L(の出力は論理レベル0と々す
、アンド回路10 、 Itの出力を論理レベルOにし
、印字ハンマー用ソレノイドを通電する。また3人力ナ
ンド回路8,9は信号Cが論理レベル0のため印字ハン
マー用ソレノイドに社通電しない。印字ドラム12行目
まで同一動作が締り返えされる。他装置が信−@Bを受
信した時、レジスタ回路Bにデータ16ビツトー理レベ
ル0を転送、信号Cの論理レベル0から1への変化点で
レジスタ回路Aにデータ16ビツト論理レベル0を転送
し、初期状態に戻して1行分の印字が終了する。
Transfer all 16 bits of BK to logic level 0 and initialize the register circuit. The register circuit has a 16-bit latch circuit, and the 16 bits correspond to the solenoid for the printing hammer, and the logic level 1 is information indicating that the printing hammer is operating, and the logic level 0 is information indicating that the printing hammer is not operating. Next, start the motor drive circuit from another device via terminal T1.
Rotate the pudding motor. The print drum rotates due to the morph rotation, and a TP multiplied signal P signal is sent out from the printer. The signal A1B%C is outputted from the waveform conversion circuit by TP and RP numbers, and is transferred to other devices via terminals T5 and T6. When the other device receives the signal B twice, it determines that the motor is rotating in a circular motion, and the third time it transfers the 16-bit data of the first row of the drum and the clock A signal to the register circuit A. The output of the register circuit A is transferred to the three-man NAND circuits 8 and 9, but since the signal C is at logic level 0, the output of the three-man NAND circuits 8 and 9 becomes logic level 1, and the AND circuit 1 (1, The output of 11 is at logic level 1 and the printing hammer solenoid is connected to the printing hammer solenoid is'+. is omitted.When the print drum moves to the first line, the signal C
becomes logic level 1, and when the output of register circuit A is logic level 1, the output of the three manual NAND circuits 8 and 9 becomes logic level 0 and =h while the signal of the waveform conversion circuit output is logic level 1. The outputs of the AND circuits 10 and 11 become logic level 0, and the printing hammer solenoid is energized to perform printing. Another device changes the logic level of signal C from 0 to 1.
As a result, 16 bits of data on the second line of the print drum and clock B are transferred to register circuit @B. The output of the register circuit B is transferred to the three-man NAND circuits 12 and 13, but the level of the signal C is inverted by the inverter circuit 14.
0, the outputs of the three manual NAND circuits 12 and 13 become logic level 1, and the printing hammer solenoid is not energized, but the printing hammer solenoid is energized by the output of the register circuit 1 path A. Print drum transitions to the second line 1,
When the signal C becomes logic level 0, the inverter circuit 1
4, and when the output of register circuit B is logic level 1, while the logic level of signal A is 1, the output of the three-man NAND circuit 12, L( becomes logic level 0, and the output of AND circuit 10, The output of It is set to logic level O, and the solenoid for the printing hammer is energized. Also, the three-man NAND circuits 8 and 9 do not energize the solenoid for the printing hammer because the signal C is at the logic level 0. The same is true up to the 12th line of the printing drum. The operation is restarted.When the other device receives the signal -@B, it transfers the 16-bit logic level 0 to the register circuit B, and transfers the data to the register circuit A at the point where the logic level of the signal C changes from 0 to 1. A 16-bit logic level 0 is transferred, the initial state is returned, and printing for one line is completed.

茨にもうひとつの方式として第5図に示すバッファレジ
スタ回路と印字回路を設はシラトして印字を行うデジタ
ルプリンタの制御方式のブロック図を示す。先ずは他装
置からイニシャル信号を端子T7を介してバッファレジ
スタ回路及び印字レジスタ回路の出力を論理レベル0の
初期状態にする。次に端子T1を介[2てモータ駆動回
路を起動する。TP倍信、RP倍信、信号A、R,Cは
前方法と同様ff4図に示すタイミングチャートに示す
信号である。他装置からのデータ転送は前方法と同様に
行う。筐5図は印字ハンマー用ソレノイド通雷回路の1
行目な示し、2行目から155行目回路は省略しである
。他装置が信号Bを受信した時、バッファレジスタ回路
に印字ドラム1行目のデータ16ビツトをデータ端子T
2を介し転送する。
As another method, a block diagram of a control method for a digital printer that performs printing by installing a buffer register circuit and a printing circuit shown in FIG. 5 is shown. First, an initial signal is sent from another device via the terminal T7 to set the outputs of the buffer register circuit and print register circuit to the initial state of logic level 0. Next, the motor drive circuit is activated via the terminal T1 [2]. The TP double, RP double, and signals A, R, and C are the signals shown in the timing chart shown in the ff4 diagram, as in the previous method. Data transfer from other devices is performed in the same way as the previous method. Figure 5 of the housing shows 1 of the solenoid energizing circuit for the printing hammer.
The circuits on the 155th line are omitted from the 2nd line. When another device receives signal B, it sends 16 bits of data from the first row of the print drum to the buffer register circuit to data terminal T.
Transfer via 2.

次に波形g*回路出力の信号Aの論理レベル0から1へ
の変化点でバッファレジスタ回路の出力が印字レジスタ
回路に転送され、印字レジスタ回路の出力が論理レベル
1の場合にインバータ回路15、16を介シ、印字ハン
マー用ソレノイドに通電開始する。また信号Aの論理レ
ベル1からOへの変化点で印字レジスタrL:11路が
初期状態にされ、印字ハンマー用ソレノイドの通電が停
止される。信号Cの論理レベルOから1の変化点で他装
置線印字″ドラム1行目のデータ16ビ゛ントをバッフ
ァレジスタ回路に転送する。印字ドラム12行まで同−
動作繰り返オされ、他装置が信号Bを受信[7たとき、
データ16ビツト論理レベル0を信号Cの論理レベル0
から1の変化点でデータ16ビツト論理レベル0をバッ
ファレジスタ回路に転送し、初期状態にし、1行分の印
字動作が終了する。
Next, at the point where the signal A of the waveform g* circuit output changes from logic level 0 to 1, the output of the buffer register circuit is transferred to the print register circuit, and when the output of the print register circuit is at logic level 1, the inverter circuit 15, 16, the printing hammer solenoid starts to be energized. Further, at the point where the logic level of signal A changes from 1 to O, the print register rL:11 path is brought to the initial state, and the energization of the print hammer solenoid is stopped. At the change point from logic level O to 1 of signal C, 16 bits of data from the 1st line of the other device line printing drum is transferred to the buffer register circuit.
When the operation is repeated and another device receives signal B [7],
Data 16-bit logic level 0 is converted to signal C logic level 0.
At the change point from 1 to 1, 16-bit logic level 0 data is transferred to the buffer register circuit to set it to an initial state, and the printing operation for one line is completed.

以上述べた。ように本発明によれば2つのレジスタを交
互に動作させるか、あるいけ転送することによって重子
部品数は従来の3分の1に減少、消費電力は約4分の1
となり従って小形軽量、低価格のa葉を容易に得られる
効果がある。
As stated above. According to the present invention, by operating the two registers alternately or transferring them, the number of multiplex components is reduced to one-third of the conventional one, and power consumption is reduced to about one-fourth.
Therefore, there is an effect that a small, lightweight, and low-cost A-leaf can be easily obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のデジタルプリンタの制御方式ブロック図
、第2図は本発明による2つのレジスタ回路を交互に印
字レジスタ回路、バッファレジスタ回路として動作させ
るデジタルプリンタの制御方式のブロック図、第3図は
デジタルプリンタの印字ドラム展開図、第4図はプリン
タ出力のドラ人位置信号を示すタイミンクチャート図、
第5図は本発明によるバッファレジスタ回路と印字レジ
スタ回路を設はシフト17て印字を行うデジタルプリン
タの制御方式のブロックを示す図である。 符号の説明 1000モータ駆動回路   2・・・・■モータ3・
・・・・・レジスタ回路 4・・・・・・印字制御回路 5・・・・0コ一ド賛換回路 第3図 第4図 ′叡罵ε
FIG. 1 is a block diagram of a conventional digital printer control system, FIG. 2 is a block diagram of a digital printer control system in which two register circuits according to the present invention alternately operate as a print register circuit and a buffer register circuit, and FIG. 3 Figure 4 is a development diagram of the printing drum of a digital printer, and Figure 4 is a timing chart showing the printer output driver position signal.
FIG. 5 is a block diagram showing a control system for a digital printer that is equipped with a buffer register circuit and a print register circuit and performs printing by shifting 17 according to the present invention. Code explanation 1000 Motor drive circuit 2...■Motor 3.
...Register circuit 4...Print control circuit 5...0 code conversion circuit Fig. 3 Fig. 4 'Excuse ε

Claims (2)

【特許請求の範囲】[Claims] (1)印字ドラムを回転させて、タイプハンマーにより
打撃印字するデジタルプリンタの制御に於いて、印字ド
ラムの桁数に相当する数のレジスタの信号によって印字
するか否かを決宇するレジスタ回路を2つ設け、該レジ
スタを交互に動作させて情報を書舞込む時間を延ばした
ことを特徴とするデジタルプリンタの制御方式。
(1) In controlling a digital printer that rotates the printing drum and performs impact printing with a type hammer, a register circuit is used to decide whether or not to print based on signals from registers whose number corresponds to the number of digits on the printing drum. A control method for a digital printer, characterized in that two registers are provided and the time for writing information is extended by operating the registers alternately.
(2)バッファレジスタ回路と、印字レジスタ回路を直
列接続1/%該バッファレジスタ回路の内容を印字レジ
スタ回路に転送することにより前駅バッファレジスタ回
路に情卸を書き込む時間を延ばしたことを特徴とする1
項記載のデジタルプリンタの制御方式。
(2) A buffer register circuit and a print register circuit are connected in series 1/% The time for writing information to the previous station buffer register circuit is extended by transferring the contents of the buffer register circuit to the print register circuit. Do 1
Control method of digital printer described in section.
JP3239682A 1982-03-03 1982-03-03 Digital printer control system Pending JPS58151269A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3239682A JPS58151269A (en) 1982-03-03 1982-03-03 Digital printer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3239682A JPS58151269A (en) 1982-03-03 1982-03-03 Digital printer control system

Publications (1)

Publication Number Publication Date
JPS58151269A true JPS58151269A (en) 1983-09-08

Family

ID=12357786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3239682A Pending JPS58151269A (en) 1982-03-03 1982-03-03 Digital printer control system

Country Status (1)

Country Link
JP (1) JPS58151269A (en)

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