JP2569220B2 - Initial setting method of logic circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic device constituted by combining a plurality of individual logic circuits, comprising an initialization circuit, wherein all the logic circuits constituting the logic device are removed from the initialization circuit. And a method of initializing a logic circuit to be initialized by the initial setting request signal.

2. Description of the Related Art In a logic device including a logic circuit that can assume different states, such as a flip-flop, there is a case where, for some reason, it is desired to reset the entire device to an initial state. In such a case, an initial setting request signal is applied from the initial setting circuit to all the logic circuits constituting the logic device to perform the initial setting. The present invention relates to a method for initializing a logic circuit used in such a case.

[0003]

2. Description of the Related Art FIG. 3 is a block diagram showing a conventional example of a method for initializing a logic circuit. In the figure, 10 is an initial setting circuit, 11 to 13 are logic circuits, V is a power supply, E is
Is earth. Logic circuits 11 to 1 constituting a logic device
Conventionally, in the case of initial setting 3, one type of initial setting request signal is transmitted from the initial setting circuit 10 to each logic circuit almost simultaneously, and initialization is performed all at once.

[0004]

When the initialization is performed by the conventional method as described above, power consumption accompanying initialization is simultaneously generated in each logic circuit, so that a particularly large current flows from the power supply V to the ground E. There was a fear of flowing. That is, as each of the logic circuits 11 to 13 constituting the logic device, there is a logic circuit that is operating during normal operation,
Since it is rare that all the logic circuits operate at the same time because some logic circuits are not operating, a particularly large current does not flow from the power supply V to the ground E. There was a risk of current flowing.

To cope with this, it is necessary to take measures such as increasing the power supply capacity and making the power supply line thicker, or limiting the number of logic circuits that can be connected to one power supply circuit, leading to an increase in cost. There has been an inconvenience that the configuration of the logical device is restricted. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for initializing a logic circuit which can solve such disadvantages in the related art, can reduce the power supply capacity, or can eliminate the restrictions on the configuration of the logic device.

[0006]

In order to achieve the above object, according to the present invention, in a logic device configured by combining a plurality of individual logic circuits, all of the logic devices constituting the logic device are provided.
When initializing the logic circuit using the initial setting circuit,
Initial setting for the individual logic circuits from the initial setting circuit.
The constant request signal is applied at a shifted timing, and
When all logic circuits have been initialized,
After completing the initialization, the logic circuit maintains its initialized state.
Thus, the initial setting request signal is applied.

[0007]

When the initial setting request signal is applied to each of the logic circuits at a shifted timing, not only the initialization timing of each of the logic circuits is shifted, but also the initialization is performed until the initialization of all the logic circuits is completed. The logic circuit which has completed the initialization applies an initialization request signal so as to maintain the initialization state. As a result, temporary power consumption due to initialization in each logic circuit does not overlap in timing, and the inconvenience of a large current flowing can be solved.

Further, the logic circuits which have been initialized before the initialization of all the logic circuits are completed are maintained in the initialized state, so that the logic circuits which have been initialized and the logic circuits which have not been initialized There is no undesired side effect of causing an undesired sneak movement between the two.

[0009]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram for explaining one embodiment of the present invention. The same components as those in FIG. 3 are denoted by the same reference numerals.

In FIG. 1, an initial setting request signal line (1) is connected to a logic circuit (1) 11 from an initial setting circuit 10, an initial setting request signal line (2) is connected to a logic circuit (2) 12, It will be appreciated that the initialization request signal lines (n) extend to the circuit (n) 13 respectively.

FIG. 2 is a timing chart showing the transmission timing of the initialization request signal transmitted on each initialization request signal line in FIG. Please refer to FIG. 1 and FIG. The timing at which the initialization request signal is transmitted from the initialization circuit 10 to the logic circuit (1) 11 is t1, the timing at which the initialization request signal is transmitted to the logic circuit (2) 12 is t2, and the timing of the logic circuit ( n) The timing at which the initialization request signal is transmitted at 13 is t3, which is different from each other.

As a result, the logic circuit (1) 11 is initialized at the timing t1 or shortly thereafter (for example, the logic circuit is a flip-flop, and the flip-flop in the 1 state is forcibly shifted to the 0 state). If this is the initialization, such initialization is performed. Similarly, at the timing t2 in the logic circuit (2) 12, at the timing t3 in the logic circuit (n) 13,
The initialization is performed at different timings, and as a result, a large current does not flow from the power supply V to the ground E at one time.

The end timings of the initial setting request signals transmitted on the respective initial setting request signal lines are almost the same at tE because of the following reason. That is, for example, when the logic circuit (1) 11 to which the initialization request signal has been applied at the timing t1 has been initialized, and before the timing t3, the logic circuit (1) 11 terminates the initialization request signal.
Thereafter, the state becomes indefinite and the logic circuit (n) 13 is initialized at timing t3 (or soon thereafter).
This is because during the period including (1), an operation (malfunction) may be caused by receiving a sneak signal or the like, which may not meet the intended purpose of initializing the logic device itself.

In other words, the application of the initialization request signal cannot be terminated to the logic circuit that has been initialized early until all the logic circuits constituting the logic device have completed the initialization. is there. In the initial setting circuit 10, as shown in FIG. 2, means for generating and transmitting a plurality of initial setting request signals having different generation timings and substantially the same end timing belongs to design matters, and various means are considered. Is not described here.

[0014]

As described above, according to the present invention,
In the method of initializing a logic circuit, there is an advantage that a required power supply capacity can be reduced or restrictions such as limiting the number of logic circuits that can be connected to one power supply circuit can be eliminated.

[Brief description of the drawings]

FIG. 1 is a block diagram for explaining an embodiment of the present invention.

FIG. 2 is a timing chart showing the timing of each initialization request signal in FIG.

FIG. 3 is a block diagram for explaining a conventional example of a method for initializing a logic circuit.

[Explanation of symbols]

 10: Initial setting circuit, 11 to 13: Logic circuit.

Claims (1)

(57) [Claims] 1. A logic device configured by combining a plurality of individual logic circuits, all constituting said logic device
When initializing all logic circuits using the initialization circuit,
Then, the initial setting circuit initializes the individual logic circuits.
Applying the fixed request signal at a shifted timing, and
First, until all logic circuits have been initialized.
The initialized logic circuit maintains its initialized state
Applying the initial setting request signal,
A method of initializing a logic circuit, comprising: