JPS58147268U - printed wiring board - Google Patents

printed wiring board

Info

Publication number
JPS58147268U
JPS58147268U JP4538982U JP4538982U JPS58147268U JP S58147268 U JPS58147268 U JP S58147268U JP 4538982 U JP4538982 U JP 4538982U JP 4538982 U JP4538982 U JP 4538982U JP S58147268 U JPS58147268 U JP S58147268U
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
boundary
wiring pattern
abstract
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4538982U
Other languages
Japanese (ja)
Inventor
秀夫 小林
関　弥四郎
三代　幹夫
Original Assignee
アンリツ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アンリツ株式会社 filed Critical アンリツ株式会社
Priority to JP4538982U priority Critical patent/JPS58147268U/en
Publication of JPS58147268U publication Critical patent/JPS58147268U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structure Of Printed Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案の一実施例のプリント配線基板を示す
斜視図、第２図は接続区域を示す拡大平面図、第３図は
一部を取換えた状態を示す斜視図である。 １・・・・・・プリント配線基板、２・・・・・・電源
回路、３・・・・・・制御回路、４・・・・・・主制御
回路、５・・・・・・境界線、６・・・・・・接続区域
、７・・・・・・配線パターン、８・・・・・・コクタ
取付は穴、１０・・・・・・別のプリント配線基板、１
２．１３・・・・・・コネクタ。FIG. 1 is a perspective view showing a printed wiring board according to an embodiment of the invention, FIG. 2 is an enlarged plan view showing a connection area, and FIG. 3 is a perspective view showing a state in which a part has been replaced. 1... Printed wiring board, 2... Power supply circuit, 3... Control circuit, 4... Main control circuit, 5... Boundary Wire, 6... Connection area, 7... Wiring pattern, 8... Hole for connector mounting, 10... Another printed wiring board, 1
2.13...Connector.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定区画部分の他の部分との電気的接続をなす配線パタ
ーンを両者の境界の所定範囲内に集中すると共に、該境
界の前記配線パターンにコネクタ接続部を設けたプリン
ト配線基板。A printed wiring board in which a wiring pattern for electrically connecting a predetermined divided portion with another portion is concentrated within a predetermined range of a boundary between the two, and a connector connecting portion is provided in the wiring pattern at the boundary.
JP4538982U 1982-03-30 1982-03-30 printed wiring board Pending JPS58147268U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4538982U JPS58147268U (en) 1982-03-30 1982-03-30 printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4538982U JPS58147268U (en) 1982-03-30 1982-03-30 printed wiring board

Publications (1)

Publication Number Publication Date
JPS58147268U true JPS58147268U (en) 1983-10-03

Family

ID=30056409

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4538982U Pending JPS58147268U (en) 1982-03-30 1982-03-30 printed wiring board

Country Status (1)

Country Link
JP (1) JPS58147268U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55146997A (en) * 1979-05-04 1980-11-15 Oki Electric Ind Co Ltd Method of fabricating integral package
JPS5712780B2 (en) * 1974-04-30 1982-03-12

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5712780B2 (en) * 1974-04-30 1982-03-12
JPS55146997A (en) * 1979-05-04 1980-11-15 Oki Electric Ind Co Ltd Method of fabricating integral package

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