JPS58146907A - Diagnozing method of timing device - Google Patents
Diagnozing method of timing deviceInfo
- Publication number
- JPS58146907A JPS58146907A JP57028764A JP2876482A JPS58146907A JP S58146907 A JPS58146907 A JP S58146907A JP 57028764 A JP57028764 A JP 57028764A JP 2876482 A JP2876482 A JP 2876482A JP S58146907 A JPS58146907 A JP S58146907A
- Authority
- JP
- Japan
- Prior art keywords
- timing
- signal
- computer
- timing device
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Testing And Monitoring For Control Systems (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
Description
【発明の詳細な説明】
(発明の技術分野〕
本発明はプロセス制御を実行する電子計算機(二外部か
ら制御タイミングをあたえるタイミング装置の誤動作を
、幽#電子計算機を用いて検知するタイミング装置の診
断方法ζ翼間するものである。DETAILED DESCRIPTION OF THE INVENTION (Technical Field of the Invention) The present invention relates to diagnosis of a timing device that uses an electronic computer to detect malfunctions of a timing device that provides control timing from the outside. The method ζ is between the wings.
プロセス制御する電子計算機(二対する制御タイミング
は、従来押釦スイッチなどを用いてオペレータが順次入
力する方法が多く用いられていたが、最近は所定のタイ
ミングを設定したタイミング装置を用い、オペレータの
介在なし鑞二所定の制御タイミングをあたえる方式が用
いられるよう1;なった。Electronic computers that control the process (Conventionally, the control timing for two processes was often input sequentially by an operator using pushbutton switches, etc., but recently, timing devices that set predetermined timings have been used, eliminating the need for operator intervention. A method that provides a predetermined control timing is now used.
この場合は、タイミング装置が自動的に動作するので、
誤動作が発生すると、プロセス制御に対して重大な事故
を招く恐れがある。In this case, the timing device operates automatically, so
If a malfunction occurs, it may cause a serious accident to the process control.
本発明はタイミング装置のタイミング不良を、そのタイ
ミング信号が入力される電子計算機を用いて診断するタ
イミング装置の診断方法を提供することを目的としてい
る。SUMMARY OF THE INVENTION An object of the present invention is to provide a timing device diagnosing method for diagnosing timing defects in a timing device using an electronic computer to which the timing signal is input.
本発明は、タイミング装置からのタイミング信号を入力
して順次所定の制御動作を行なう電子計算機(=タイミ
ング信号の各時間間隔に対応する時間間隔を設定し、タ
イミング信号が順次設定された時間間隔内ζ二人力され
ないことを検出して、タイミング装置op動作を判別す
る診断方法である。The present invention is an electronic computer that inputs timing signals from a timing device and sequentially performs predetermined control operations. ζ This is a diagnostic method that detects that the timing device is not being operated and determines whether the timing device is operating properly.
本発明の一実施例な第1図(=示す。第2図は第1図亀
:おける電子計算機の診断動作を示すフローチャートで
ある。One embodiment of the present invention is shown in FIG. 1. FIG. 2 is a flowchart showing the diagnostic operation of the computer in FIG. 1.
以下第1図の動作をs2図の70−チャートを参照して
説明する。The operation of FIG. 1 will be explained below with reference to chart 70 of FIG. s2.
押釦スイッチlを押すと、入力織t2mを介してタイミ
ング信号7aが電子計算機3(=入力される。When the pushbutton switch 1 is pressed, the timing signal 7a is input to the computer 3 via the input thread t2m.
電子計算機3はタイミング信号7&を受信すると、出力
装置5aを介してタイよング装置44;起動指令81を
あたえる。When the computer 3 receives the timing signal 7&, it gives a timing device 44; a start command 81 via the output device 5a.
タイミング装置4は起動指令8aを受けると所定時間間
隔Ta後に、入力装置2bを介して電子計算機3にタイ
(ング信号7bをあたえる。Upon receiving the activation command 8a, the timing device 4 gives a timing signal 7b to the computer 3 via the input device 2b after a predetermined time interval Ta.
電子計算機3には上記所定時間間隔TIよりわずかに長
い遅延時間Taを設定しておき、起動指令8aを出力し
た時点からT&後(ニタイ擢ング信号7bが受信されて
いるかどうかをチェックする。A delay time Ta that is slightly longer than the predetermined time interval TI is set in the electronic computer 3, and after T& (from the time when the startup command 8a is output), it is checked whether or not the output signal 7b is received.
!イ建ング信号7bが遅延時間Ta以内6二受信されて
おれば、その時のタイミング&t4の動作はもしタイミ
ング信号7bが遅延時間Ta以内(二受信されていない
ときは、電子計算機3はこれをタイミング装置4の誤動
作と判断し、プロセス制御停止を行なうと共d二、出方
装置5bを介して警報装置it6ζ二曽報信号8bを出
力して慶報を行なう。! If the timing signal 7b is received within the delay time Ta (62), the operation of timing &t4 is as follows: If the timing signal 7b is not received within the delay time Ta (2), the computer 3 It is determined that there is a malfunction in the device 4, and the process control is stopped, and the alarm device it6ζ2 alarm signal 8b is outputted via the output device 5b to give a congratulatory message.
後続のタイミング48号70,7dについても同様なチ
ェックが行なわれ、タイミング信号が正常なときは電子
計算機3は順次プロセス制御を実行すると共(二、タイ
ミング信号が所定の間隔で入力されないときは、電子計
算機3はプロセス制御を停止すると共にIl@装置6で
警報を行なう。A similar check is performed on the subsequent timing signals 70 and 7d, and when the timing signals are normal, the computer 3 sequentially executes process control (2. When the timing signals are not input at predetermined intervals, The computer 3 stops the process control and issues an alarm via the Il@ device 6.
これによってタイミング装置4の異常を検出昧タイミン
グの異常(二よるプロセス制御の事故を防止することが
できる。This makes it possible to detect abnormalities in the timing device 4 and prevent process control accidents due to timing abnormalities.
以上説明したように本発明によれば、プロセス制御を実
行する電子計算機(=外部から制御タイミングをあたえ
るタイミング装置の誤動作を、尚腋電子計算機を用いて
検知するタイミング装置の診断方法が得られる。As described above, according to the present invention, there is provided a method for diagnosing a timing device that uses an electronic computer to detect a malfunction of a timing device that provides control timing from the outside.
第1図は本発明の一実施例を示す系統図、第2図はその
診断動作−を示すフローチャートである。
1 押釦スイッチ
21〜2d 入力装置
3 電子計算機
4 タイミング装置
5m、5b 出力装置
6 餐報装置
(8733)代理人 弁理士 猪 股 祥 晃(ほか1
名)第1m1FIG. 1 is a system diagram showing an embodiment of the present invention, and FIG. 2 is a flowchart showing its diagnostic operation. 1 Push button switches 21 to 2d Input device 3 Electronic computer 4 Timing device 5m, 5b Output device 6 Information device (8733) Agent Patent attorney Yoshiaki Inomata (and 1 others)
name) 1st m1
Claims (1)
信号(対応じて順次所定の制御動作を行なう電子計算機
の中1=、上記タイ建ング信号O各時閏間隔−二対応す
る時間間隔を設定し、上記タイミング信号が順次設定さ
れた時間間隔内(−入力されない仁とを検出すること(
二よって、タイ叱ング装1 置のwA11IJfIIt/制別することを特徴とする
タイミング装置の診断方法。[Scope of Claims] A timing signal from a timing device is input, and the signal (in an electronic computer that sequentially performs predetermined control operations in response to 1=, the above-mentioned tie-setting signal O, each time leap interval-2) corresponds to Set a time interval, and detect if the timing signal is not input within the set time interval (-).
2. Therefore, a method for diagnosing a timing device, characterized in that it discriminates wA11IJfIIt/of the timing device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57028764A JPS58146907A (en) | 1982-02-26 | 1982-02-26 | Diagnozing method of timing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57028764A JPS58146907A (en) | 1982-02-26 | 1982-02-26 | Diagnozing method of timing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58146907A true JPS58146907A (en) | 1983-09-01 |
Family
ID=12257468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57028764A Pending JPS58146907A (en) | 1982-02-26 | 1982-02-26 | Diagnozing method of timing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58146907A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03212307A (en) * | 1990-01-17 | 1991-09-17 | Ibaraki Seiki Kk | Film bending device for tray packaging machine |
EP1353271A3 (en) * | 2002-04-10 | 2007-09-12 | Alps Electric Co., Ltd. | Controller with fail-safe function |
-
1982
- 1982-02-26 JP JP57028764A patent/JPS58146907A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03212307A (en) * | 1990-01-17 | 1991-09-17 | Ibaraki Seiki Kk | Film bending device for tray packaging machine |
EP1353271A3 (en) * | 2002-04-10 | 2007-09-12 | Alps Electric Co., Ltd. | Controller with fail-safe function |
US7373487B2 (en) | 2002-04-10 | 2008-05-13 | Alps Electric Co., Ltd | Controller with fail-safe function |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS58146907A (en) | Diagnozing method of timing device | |
JPS58115561A (en) | Memory dump system | |
JPS5936786B2 (en) | Failure detection device for weighing machine control | |
JPH10320080A (en) | Reset circuit for information processor and resetting method | |
JPS6313559Y2 (en) | ||
JPS5846451A (en) | Detection processing system for runaway of program | |
JPS5847745B2 (en) | information processing system | |
JP2548479B2 (en) | Computer system operation monitoring method | |
JP2698431B2 (en) | Timeout detection device | |
JPH01223521A (en) | Large scale integrated circuit | |
JPH03202926A (en) | Data processor | |
JP2605440B2 (en) | Data processing device | |
JPH09212201A (en) | Control circuit for production facility | |
JPH05282167A (en) | Method for processing fault | |
JPS59114647A (en) | Diagnosing system of information processor | |
JPS58172761A (en) | Watchdog circuit | |
JPH0652004A (en) | Pair cpu unit | |
JPH04246735A (en) | In-circuit emulator | |
JPH0363731A (en) | System fault processing method | |
JPS6269344A (en) | Control system for input and output device | |
JPS63241622A (en) | Data processor | |
JPS6177940A (en) | Rise control method for processor | |
JPH02101540A (en) | System for detecting runaway of cpu | |
JPH04354033A (en) | Watch dock circuit | |
JPS63116243A (en) | Self-diagnosing system |