JPS58145254A - Digital data transmission circuit - Google Patents

Abstract

PURPOSE:To reduce transmission rate, by switching plural synchronizing signals to send a data control signal and eliminating the need for the addition of data control signal to a recording signal. CONSTITUTION:Plural synchronizing signal patterns are prepared and the data control signals and the synchronizing signal patterns are corresponded. At recording, the synchronizing signal pattern is selected at a producing circuit 5 based on a data control input 3. An error correction code and the selected synchronizing signals are given to an input data 1 to form a recording signal. Further, at reproduction, plural synchronizing signal detection circuits 12 corresponding to each synchronizing signal pattern are prepared, each output is led to a gate 14 to obtain synchronizing signals by logical sum. A data control signal reproducing circuit 15 reproduces the data control signal corresponding to the synchronizing signal pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital data transmission circuit for a data control signal added to recorded data in recording and reproducing PCM signals.

Conventionally, data control for prohibiting dubbing and ennoasis has been performed by adding a data control signal to the beginning of recorded data.

FIG. 1 shows a conventional recording signal processing circuit, and FIG. 2 shows a conventional reproduction signal processing circuit. In FIG. 1, 4 is an error correction code generation circuit, 5 is a synchronization signal generation circuit, 6 is a data control signal generation circuit, and 7 is a signal switching circuit. Further, in FIG. 2, 1° is a signal demodulation circuit, 11 is a data control signal detection circuit 12 is a synchronization signal detection circuit, and 13 is a signal processing circuit for performing error correction and data control.

During recording, an error correction code, a synchronization signal, and a data control signal generated based on the data control signal 3 are added to the data signal 1 to form a recording signal 2. During playback, after the playback signal 8 is demodulated by the signal demodulation circuit 1o, the synchronization signal detection circuit 1
A synchronizing signal is detected by 2, a data control signal is detected based on the synchronizing signal, and a signal processing circuit 13 performs error correction and data control to output data 9.

In conventional data control methods, since a data control signal is added, redundancy increases and the transmission rate increases. Therefore, this becomes a problem when there is not enough recording capacity.

An object of the present invention is to provide a digital data transmission circuit for data control signals in which the transmission rate does not increase.

Therefore, the present invention attempts to transmit a data control signal by preparing a plurality of synchronization signals and switching the synchronization signals.

An embodiment of the present invention will be described below with reference to FIGS. 3 and 4. FIG. 3 shows a recording signal processing circuit of the present invention, and FIG. 4 shows a reproduction signal processing circuit of the present invention.

First, a plurality of synchronization signal patterns are prepared, and the data control signals are made to correspond to the synchronization signal patterns. At the time of recording, the pattern of the synchronization signal generated by the synchronization signal generation circuit 5 is selected based on the data control manual 3. Then, an error correction code and this synchronization signal are added to the input data 1 to form a recording signal. During reproduction, a plurality of synchronization signal detection circuits 12 corresponding to respective synchronization signal patterns are prepared, and a synchronization signal is obtained by ORing the outputs of the respective synchronization signal detection circuits with a gate 14. Further, the data control signal reproducing circuit 15 reproduces the data control signal corresponding to the synchronizing signal pattern.

According to this embodiment, data control can be performed without adding a data control signal to a recording signal.

Therefore, according to the present invention, a data control signal can be transmitted without adding a data signal to a recording signal, and the transmission rate can be reduced.

[Brief explanation of the drawing]

FIG. 1 shows a conventional recording signal processing circuit, FIG. 2 shows a conventional reproduction signal processing circuit, FIG. 3 shows a recording signal processing circuit of the present invention, and FIG. 4 shows a reproduction signal processing circuit of the present invention. 5...... Synchronous signal generation circuit 7...
......Signal switching circuit 12...
- Synchronous signal detection circuit 15... Signal processing circuit 14... Gate 15... Data control signal regeneration circuit. ! V1rs! J garden 2 diagram

Claims (1)

[Claims] A data error correction code generation circuit, a synchronization signal generation circuit,
A recording circuit that generates a recording signal by switching input data, a correction code generated by the data error correction code generation circuit, and a synchronization signal generated by the synchronization signal generation circuit, a synchronization signal detection circuit, and the synchronization signal detection circuit. In a digital data transmission circuit composed of a reproduction circuit consisting of a signal processing circuit that performs error correction and reproduces data based on a synchronization signal detected by the A synchronization signal generation circuit that generates a synchronization signal pattern according to a control input, a synchronization signal detection circuit that discriminates the synchronization signal pattern, and a circuit that reproduces a data control signal according to the determined pattern. Digital data transmission circuit.