JPS58144927A - Controlling system of power supply - Google Patents

Abstract

PURPOSE:To prevent a malfunction as well as to simplify the control stage of a power supply, by using data in which (n) bits are all ''1'' to the data on the OFF state of the power supply and threrefore by performing the control stage just by an erasing action. CONSTITUTION:When a switch C is turned on, a reset pulse generating circuit 5 generates a reset pulse E by the output voltage F of a power supply 4 of the control part. A control circuit 2 starts its operation when the pulse E is changed to a high level from a low level and after the voltage F is applied. In this case, a power supply 9 of a part B to be controlled is controlled by a power supply switch 7, and a control signal G is applied from the circuit 2. The self-supporting action is performed through the circuit 2 and a nonvolatile memory 3. When the electric power H of the input side of the switch 7 is cut off, the circuit 2 is reset to its initial state by the pulse E when the power H is applied later. Then the switch 7 is kept at a state set before the power H is cut off.

Description

[Detailed description of the invention] This invention relates to a power supply control system.

When self-holding the power supply in various systems,
Conventionally, self-holding relays were used to open and close the power supply.

There are various types of self-holding relays, such as the one shown in FIG. That is, 51 is a self-holding type relay, and when an on signal 53 is applied from the control & i circuit 52, an on pulse 55 is applied to the relay 51 by the drive circuit 54.
mb turns the relay 51 off, and even if the control signal 53 disappears, the relay 51 remains on. Furthermore, when the control circuit 52 applies the shutoff signal 56, the drive circuit 57
As a result, an off pulse 58 is applied to the relay 51 to turn the relay 51 off, and even if the control signal 58 disappears, the relay 51 maintains the off state U. As a result, the input voltage is cut off and then reapplied, so that the relay 51 maintains the previous tilting motion without transmitting a control signal to the relay 51.

However, when using this self-holding relay, the structure is complicated, the driving method is also complicated, and its operation cannot be replaced with a semiconductor switching element (Trybook, Siris!, transistor, etc.). It had the drawback of being difficult to chew.

Therefore, an operation similar to that of a self-holding type relay is constructed by a non-volatile memory element, a normal non-self-holding type relay or a semiconductor switch element, and a control circuit, and the state of the power supply for ON or OFF driving of the control circuit is changed. By using a method of embedding the circuit into a non-volatile memory, when using a self-holding relay, the circuit can be simplified (2>E) and costs can be reduced.

However, this method often uses non-volatile memory. After +4 is lost, a series of erasing and writing operations are required to save the power supply data, and during this operation, the control circuit is initialized just before erasing the memory and writing the power state. When returning to the current state, the contents of the memory remain erased, so that an accurate %lif source state cannot be obtained, leading to malfunctions.

Therefore, an object of the present invention is to provide a power supply control method that can prevent malfunctions and simplify the control process in a circuit that includes such a switching circuit, memory, and control circuit.

That is, the present invention provides a switching circuit that controls opening and closing of a controlled circuit, a control circuit that turns on and off the switching circuit, and an on-state acid thereof.

It has a non-volatile memory that stores on-state acid, and when writing data in the power-on state of this memory, data in which at least one bit among n pits is not rlJ is used and processing is performed only by a write operation. Data in which all n bits are "1" is used as the data, and processing is performed only by an erase operation. 1. As a result, the power state information can be reliably stored in the memory, and since no erasing operation is involved when writing data, there is no possibility of writing data incorrectly. It is shown in Figure 5. First, Figure 1 shows a control unit A that performs various controls using remote control signals and operation switch inputs suitable for the system, and a controlled unit B that is controlled by control signals from control unit A. be. In the figure, l is a remote control signal receiving unit, 2 is a control circuit, 3 is a non-volatile memory, 4 is a control unit power supply, 5 is a reset pulse generation circuit, 6 is an operation switch, and 7 is a power supply switch. , 8 is a controlled circuit, and 9 is a controlled section power supply circuit. This is also the cFi main power switch), and this system operates when this is in the on state. b
Let us now consider the case where the electric cup 9 of the controlled section B is controlled by the control circuit 2. When the switch C is turned on, the output voltage F of the control unit power supply 4 becomes as shown in FIG. 2(a), and the reset pulse generation circuit 5 is operated by the output voltage F.
In the above case, the reset pulse E as shown in FIG. 2 is also generated after some delay. The control circuit 2Fi starts operating from the initial state when the reset pulse E changes from the low level to the high level after the pressure F is turned on. At this time, the controlled part B
The power source 9 is controlled by a power switch 7, and a control signal G of the switch 7 is applied to the control circuit 2. The self-holding operation of the switch 7 is controlled by the control circuit 2 and the non-volatile memory 3.
When the switch C is currently in the ON state, the remote control signal or the signal G that turns the power switch 7 into the ON state or ON state by the operation switch 6 is sent to the control circuit 2. If the power H on the input side of the switch 7 is cut off by the switch C or some other factor while the power I is being controlled, then when the power H is applied, the control circuit 2 will generate a reset pulse EK. Therefore, the state is returned to the initial state, and the state of the power switch 7 is maintained in the state before the power H was cut off.

The details are shown in Figure 5 including Figure 3.
is composed of a relay 7' or a semiconductor switch element, which is driven by a drive circuit 12, and its control signal 9' is sent from the control circuit 2.The operation of the nonvolatile memo w3 is controlled by the control circuit 2 by a signal N. control,
(1) Address input.

1) Data read, (I) Data input 1st page data erase 5
(v) Perform operations such as data writing. That is, the above ()
) sends address data to the address register 13 in response to the signal NK, and specifies a certain address within the memory element 14. The above-mentioned (2) reads the contents of the designated address into the data register 15 and sends it to the signal N. At this time, the signal N
U- may be a separate signal from the internal signal N. Said [
[Yes] inputs data to the data register 15 using the signal N. The above (■) erases the contents of the specified address in the memory element 14. At this time, it is assumed that all bits of the address are "1". The above (V) indicates that the data in the data register 15 is stored in the memory element 14 specified.
write to the address of Here, one address with memory 3? , # of n-bit memory elements are used as power state memory.

Therefore, the operation of the control circuit (see Figure 8g5) will be explained.

Let us now consider the case where the control circuit 2 is in normal operation with the voltage F being applied thereto. At this time, the operation passes through the main routine processing step of the fifth step, in which various operations are received and control signals are issued.

Of these, the processing related to the wire switch 7 is extracted from the sixth section. @7 process. ,! In step 6, the switch 6
etc., it is determined whether or not a command has been issued to turn on the relay relay', and in the seventh step, it is determined whether or not a command has been issued to turn off relay 7'. 5 steps Kt! Go back and migrate. If the VV-7' is currently in the off state and a signal to turn on the relay 7' is received from the switch 6 or the like, the process passes through the sixth process (YES) and moves to the third process. In the third step, a signal G' for turning on the relay 7' is output, which in turn drives the drive circuit 12 and outputs a signal M for keeping the relay 7' on. After that, in the fourth step, memory 3\address data "P#" is inputted by signal N, and data in which at least one bit of the memory 3\n pit is not "1" (here, this is data in the power-on state) is input. ).

Then, the data is written to the address P' of the memory 3, and then the process returns to the main routine processing step (fifth step) for controlling other than the power supply state.

In this state, the power H on the input side of the control unit 2 in FIG.
Consider a case where power H is cut off and power H is applied again.

First, electric power H is applied, a voltage F is generated, and a reset pulse E is generated, and when the control unit 2 returns to the initial state,
The process will start from the first step shown in FIG. At this time, the signal G' is always in the off state. In the first step, the memory 31\address data "P' is inputted by the signal N, and the data at address 1P' is further read out. In the second step, the previously read data has at least l bits out of n bits " If it is not "l", that is, the power is on (YES), proceed to the third step and turn on the relay 7' as explained above. , @4 process, data in which at least one bit of the memory 3 address -P# Kn bit is not "l", that is, l' phi
Writes the ON state data and enters the main routine processing process. Therefore, when the power H is applied again after the relay 7' is off and the power H is cut off, the power H is cut off and the state of the power supply just before 2 is read from the memory 3, and it shows the on state. By turning on the relay 7' when the parrot is running, the state immediately before the power H is cut off can be maintained.

Next, consider a case where the relay 7' is in the off state and a signal to turn off the relay 7' is received from the switch 6 or the like. At this time, the main routine processing process proceeds to the eighth process by the sixth process (NO) and the seventh process (YES), and by the signal N, the memory 3\address data 1P
’. Then, it is assumed that the power off state has been written by erasing Atois 1P' in the memory 3 and setting all n bits of the memory 3 to "IJ".Furthermore, in the ninth step, the relay 7' is turned off. signal G
' and returns to main routine processing step (fifth step) K. In this state, if we consider that the electric power H of the control unit 2 is cut off and then applied again, when the electric power H is applied, the reset pulse E causes the control unit 2 to immediately return to the initial stage and start the first process. to go into. At this time, the signal G' is in an off state. Similarly to the above, in the first step, the data t-U of the address 0P' of the memory 3 is output, and in the second step, if all n bits of the data read earlier are "1", the power is turned off (91).
(No), the main routine processing step of step t5 is entered, and the relay 7' is held in the OFF state.

Therefore, when the relay 7' is in the OFF state, the power H is cut off, and even when the power H is applied again, the state before the power H is cut off ui' can be read from the memory 3 and that state can be maintained.

As described above, in the power supply control method of the present invention, when the switching circuit, the nonvolatile memory, and the control circuit perform a self-holding operation on the switching circuit, at least one bit among the lobits of the memory is not "L". data t
- Since all data in the power-on state is set to the power-off state, the series of operations for erasing and writing can be simplified, and there is no malfunction even if the control circuit returns to the initial state immediately before writing. In addition, it is possible to achieve the same operation as a conventional self-holding relay using a normal relay or a semiconductor switch element, which has the following effects: circuit simplification, cost reduction, and the possibility of using semiconductors. .

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a time chart in the initial state of the control circuit, Fig. 3 is a detailed block diagram of main parts, Fig. 4 is a detailed block diagram of the memory,
FIG. 5 is a flowchart, and FIG. 6 is a block diagram of a conventional example. l...Remote control receiver (operation signal), 2...control circuit, 3...nonvolatile memory, 6...operation switch (
(operation signal), 7-・Power switch, 7'... Relay (switching circuit), 8... Controlled circuit Figure 2 Figure 3 Figure 5 Figure 6

Claims (1)

[Claims] a switching circuit that controls opening and closing of the controlled circuit;
A control circuit for driving the switching circuit on and off, and a nonvolatile memory for storing the on or off driving state of the control circuit to make the switching circuit self-retentive, the nonvolatile memory having one address. The n-bit memory element of is used as a W source state memory, and the power-on state data is stored by writing data in which at least one of the n bits is not "1" to the battery trace memory. , and the power state memory n
A power supply control method characterized by writing data in which all n bits are "1" by erasing bits, and storing data in a power-off state.