JPS58141063A - Save method for call information - Google Patents

Save method for call information

Info

Publication number
JPS58141063A
JPS58141063A JP2403682A JP2403682A JPS58141063A JP S58141063 A JPS58141063 A JP S58141063A JP 2403682 A JP2403682 A JP 2403682A JP 2403682 A JP2403682 A JP 2403682A JP S58141063 A JPS58141063 A JP S58141063A
Authority
JP
Japan
Prior art keywords
connection
memory
ort
trunk
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2403682A
Other languages
Japanese (ja)
Inventor
Hiroshi Sakai
境 弘志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2403682A priority Critical patent/JPS58141063A/en
Publication of JPS58141063A publication Critical patent/JPS58141063A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

PURPOSE:To allow call information to save without providing any expensive external device by transferring a connection state stored in a main storage memory to internal storage means of a trunk and a line circuit when a call state changes. CONSTITUTION:When a subscriber SUB.A in a figure (a) performs off-hook operation, the off-hook information is sent out to a central controller CC as shown in a figure (b). Then, the central controller discriminates a connection task to be processed by next on the basis of the connection state number of the connection state memory in the main storage memory and change information to run the connection task, and processes the selection of an originating register trunk ORT, a link connection between the SUB.A and ORT, the transmission of control information to the ORT for the transmission of a dial tone (DT), etc. are processed; and the STN in the MM and connection state memories in the line circuit LN and ORT is set in a memory X and accomodation position information on a destination of connection set the SUB.A in the memory of the ORT, and the accomodation position of the originating register trunk ORT is set in the memory of the SUB.A to complete processing from the figure (a) to the figure (b).

Description

【発明の詳細な説明】 本発明は電子交換機における障害発生時に通話中の呼救
済を行なう呼情報退避方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a call information saving method for relieving a call in progress when a failure occurs in an electronic exchange.

従来、この塊の呼情報の退避はティスフ装置等の外部記
憶装置と、外部記憶制御回路から主記憶メモリに対する
メモリアクセスを可能とする為の公知のDMA@能とを
設け、プログラムが一定周期に接続状態が記憶されてい
る主記憶メモリの先頭アドレス、終了アドレス、転送蓋
を指定しfc稜チャンネル制御命令を実行することによ
ル、公知のDNA機能によって主記憶メモリ内の接続状
態メモリの内容を退避してい九〇シたがって、ff情報
退避のために外部記憶装置及び制御回路が高価なものと
なル、また接続状態のいかんに拘らず一定周期毎にメモ
リ内容を退避していたため処理装置の処理能力が低下す
るという欠点があった。
Conventionally, this bulk of call information can be saved by providing an external storage device such as a TIF device and a well-known DMA@ function to enable memory access to the main memory from an external storage control circuit. By specifying the start address, end address, and transfer lid of the main memory where the connection state is stored and executing the fc ridge channel control command, the contents of the connection state memory in the main memory are determined using a known DNA function. Since the 1990s, external storage devices and control circuits have become expensive to save ff information, and the memory contents have been saved at regular intervals regardless of the connection status, so processing This has the disadvantage that the processing capacity of the device is reduced.

本発明の目的は、上記のような高価な外部装置および制
御機能を有することなく、また、中央処理装置の処理能
力を低下させることなく呼情報の退避を可能とする方法
を提供するものである。
An object of the present invention is to provide a method that allows call information to be saved without requiring expensive external devices and control functions as described above, and without reducing the processing capacity of the central processing unit. .

本発明の呼情報退避方法は呼の接続状態を主記憶メモリ
に記憶し状態変化が生起した際にこの接親状態をもとに
して次に成すべき接続をプログ2ムで随時識別し接続制
御を行なう電子交換機に於いて、ライン回路とトランク
回路のそれぞれに個々の接続状態を記憶する手段とマイ
クロプロセッサとを有し、呼の状態変化が生起した際、
主記憶メモリに記憶されている接続状態を中央制御装置
および前記マイクロプロセッサを介してただちに前記ト
ランク及びライン回路の内部記憶手段に遷移させること
により、呼情報が常時ライン回路およびトランク回路に
退避される構成とすることを特徴としている。
The call information saving method of the present invention stores the connection status of a call in the main memory, and when a change in status occurs, the program identifies the next connection to be made based on the connection status at any time and controls the connection. In an electronic switching system that performs
By immediately transferring the connection state stored in the main memory to the internal storage means of the trunk and line circuits via the central controller and the microprocessor, call information is always saved in the line circuits and trunk circuits. It is characterized by having a structure.

次に本発明の大施例について図面を参照して説第1図は
ライン回路LC及びトランク回路TRK内部マイクロプ
ロセッサMCk’Uを使用した電子交換機の中継方式図
を示す。第2図は第1図に示すらなる接続状態メモリの
構成図、!3図は第1図に示すライン回路図、第4図は
第1図に示すトランク回路図、第5図(m 、 (b)
は内線加入者5UB−Aがオフ7ツクした際の状態遷移
図である。
Next, a major embodiment of the present invention will be explained with reference to the drawings. FIG. 1 shows a relay system diagram of an electronic exchange using a line circuit LC and a trunk circuit TRK and an internal microprocessor MCk'U. FIG. 2 is a configuration diagram of the connection state memory shown in FIG. 1. Figure 3 is the line circuit diagram shown in Figure 1, Figure 4 is the trunk circuit diagram shown in Figure 1, and Figure 5 (m, (b)).
7 is a state transition diagram when extension subscriber 5UB-A is turned off.

第1図から第4図に於いて、通常加入者ラインおよびト
ランクラインの状態変化はライン回路LCトランク回路
TRK内部のオーダーデコーダDECを介したマイクロ
プロセッサNCPUで監視されてお夛、状態変化検出時
にインターフェース回路lNTを経由して中央制御装置
CCへ変化情報を送出する。変化情報を受信した中央制
御装&CCは主記憶メモ]MV内に有する当該秦続状態
メモリの接続状態番号と変化情報をもとにして次に成す
べき接続タスクを識別する。この後中央制御装置CCが
かかる接続タスクを実行することにょシ、スイッチ5W
NETの接続、復旧の制御、当該ライン回路LCおよび
トランク回路TRKに対する制御情報の送出がインター
フェース回路INTを経由して行なわれ、主記憶メモリ
NM内の当該接続状態メJEすの接続状態番号を次の状
態へ遷移させるとともに、尚該ライン回路LC,)、r
ンク回路TRKへ接続状態番号を送出する。これによ逆
接続状態番号を受信したライン回路LC,およびトラン
ク回路TRK内部のマイクロプロセッサNC)’Uは、
自身の接続状態メモI) Mへ該番号を書込み一つの状
態変化に対する処理を終了する。なお第1図に示す80
B−A−N  は内線加入者、(JRTは発信レジスタ
トランクを示す。
In Figures 1 to 4, changes in the status of subscriber lines and trunk lines are normally monitored by the microprocessor NCPU via the order decoder DEC inside the line circuit LC trunk circuit TRK, and when a status change is detected. The change information is sent to the central control unit CC via the interface circuit INT. Having received the change information, the central control unit & CC identifies the connection task to be performed next based on the connection state number and change information of the connection state memory in the main memory memory MV. After this, the central controller CC performs this connection task, and the switch 5W
NET connection, control of recovery, and transmission of control information to the line circuit LC and trunk circuit TRK are performed via the interface circuit INT, and the connection status number of the connection status menu JE in the main memory NM is stored as follows. At the same time, the line circuit LC, ), r
The connection status number is sent to the link circuit TRK. As a result, the line circuit LC and the microprocessor NC)'U inside the trunk circuit TRK which received the reverse connection status number are
Own connection status memo I) Write the number to M and complete the process for one status change. Note that 80 shown in Figure 1
B-A-N indicates extension subscriber (JRT indicates calling register trunk).

次に第5図(a) 、 (bJを参照しながら実際の呼
の遷移につき説明する。
Next, the actual call transition will be explained with reference to FIGS. 5(a) and 5(b).

第5図(a)は内線加入$81JB−Aの空の状態から
電話機のフックを上げたときの遷移図である。この(a
J図では8TJB−Aが空の状態を示し、ライン回路L
C及び主記憶メモリNN内の5UB−A接続状態メモリ
内の接続状態番号8TN 及び接続先収容位置情報はオ
ール0となっている0この状態から5IJB−Aがオフ
フックすると、(b)図に示すようにオフフッタ情報は
インターフェイス装置ANTを経由し中央制御装置CC
へ送出される。この後中央制御装置CCは前述の方法に
よ多接続タスクを実行し、発信レジスタトランク(JR
Tの選択、5tJB−AとC)ftT間のリンク接続、
ダイヤルトーン(DT)送出のため制御情報の発信レジ
スタトランクθRTへの送出等の処理が行なわれ、主記
憶装置′MM、ライン回路LC及び発信レジスタトラン
クORT内の接続状態メモリの8’llがXに、また接
続先収容位置情報が発信レジスタトランクORTのメモ
リには5UB−Aが、さらに80B−Aのメモリには発
信レジスタトランク(JRTの収容位置が夫々設定され
(511図から(bJ図への処理が完了するO 以上本発明の一実施例としてライン回路LC及びトラン
クTRK内にマイクロプロセッサMC)’U及びメそす
Mを有した場合について説明したが、これをライン回路
LC及びトランクTRR内に7リツプフロツク又蝶レジ
スタ等を有し、中央制御装置CCから直接lO制御命令
で書込み、読出しを行ない上記と同等な処理を容易に実
施することも可能である。又、障害発生時に通話呼のみ
を救済するという観点から考えれば通話状態に遷移する
ときのみライン回路、トランク回路の接続状態メモリを
遷移させる様に構成することにより一層中央制御装置C
PUの処理能力を向上させることも可能となる。
FIG. 5(a) is a transition diagram when the telephone is hooked up from an empty state with an extension subscription of $81JB-A. This (a
In figure J, 8TJB-A shows an empty state, and line circuit L
The connection state number 8TN in the 5UB-A connection state memory in the C and main memory NN and the connection destination storage location information are all 0.0 When 5IJB-A goes off-hook from this state, the connection state number 8TN in the 5UB-A connection state memory in the main memory memory NN is 0. The off-footer information is sent to the central controller CC via the interface device ANT.
sent to. After this, the central controller CC performs the multi-connection task in the manner described above and performs the outgoing register trunk (JR
Selection of T, link connection between 5tJB-A and C) ftT,
In order to send dial tone (DT), processing such as sending control information to the transmission register trunk θRT is performed, and 8'll of the connection state memory in the main memory MM, the line circuit LC, and the transmission register trunk ORT is In addition, connection destination accommodation location information is set in the memory of the originating register trunk ORT for 5UB-A, and in the memory for 80B-A, the accommodation location of the originating register trunk (JRT) is set respectively (from Figure 511 to Figure bJ). The above process is completed.O As an embodiment of the present invention, the case where the line circuit LC and the trunk TRK include the microprocessors MC'U and M is explained above. It has 7 liplocks or butterfly registers, etc., and it is possible to write and read directly from the central control unit CC using IO control commands, making it possible to easily perform the same processing as above.In addition, it is possible to easily perform the same processing as above when a failure occurs. From the perspective of relieving only the central control unit C, the central control unit
It also becomes possible to improve the processing capacity of the PU.

本発明は以上説明したように、ライン回路、トランク回
路内部にメモリと、マイクロプロセッサあるいはフリッ
プ70ツブ又はレジスタ等を持たせ、接続状態を状態遷
移時前記ライン回路、トランク回路に記憶させることに
より、高価な外部装置を持つことなく呼情報の退避が可
能とな)、且つ複雑なハードおよびソフトの設計が不要
となるという効果がある。
As explained above, the present invention includes a memory, a microprocessor, a flip 70 tube, a register, etc. inside the line circuit or trunk circuit, and stores the connection state in the line circuit or trunk circuit at the time of state transition. This has the advantage that call information can be saved without requiring expensive external equipment) and that complicated hardware and software designs are not required.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明における交換機の中継方式図、第2図は
m1図に示す主記憶メモリ及びツイン。 トランク内部に有する接続状態メモリの構成図、第3図
は第1図に示すライン回路図、第4図は第1図に示すト
ランク回路図、第5図(a) 、 (b)は内線加入者
がオフフックした際の状態遷幾因である。 be・・・・・・ライン回路、TRK・・・・・・トラ
ンク回路、MCPTJ・・・・・・マイクログロセクf
、8WNET・・・・・・スイッチネットワーク、IN
T・・・・・・インターフェース回路、CC・・・・・
・中央制御装置、MV主記憶メモリ、N・・・・・・ラ
イン・トランク内部メモリ、I)EC・・・・・・オー
ダーデコーダ、5UB−A〜N・・・・・・内線加入者
A〜N、ORT・・・・・・発信レジスタトランク、8
TN・・・・・・接続状態番号。 箭1図 荊ど目 7N7’\ 9f53 図 マ INTへ 箔4図 〔A犬@A) 〔吠荊B〕
FIG. 1 is a relay system diagram of an exchange according to the present invention, and FIG. 2 is a main storage memory and twin shown in FIG. m1. A configuration diagram of the connection status memory inside the trunk, Figure 3 is the line circuit diagram shown in Figure 1, Figure 4 is the trunk circuit diagram shown in Figure 1, and Figures 5 (a) and (b) are extension line connection diagrams. This is the cause of the state transition when the user goes off-hook. be... line circuit, TRK... trunk circuit, MCPTJ... microgross section f
, 8WNET...Switch network, IN
T...Interface circuit, CC...
・Central control unit, MV main memory, N...Line trunk internal memory, I)EC...Order decoder, 5UB-A~N...Extension subscriber A ~N, ORT...Outgoing register trunk, 8
TN...Connection status number. Bamboo 1 figure Jibome 7N7'\ 9f53 Figure M INT to foil figure 4 [A dog @ A) [Barb B]

Claims (1)

【特許請求の範囲】[Claims] 呼の接続状態を主記憶メモリに記憶し状態変化が生起し
た際にこの接続状態を基にして次に成すべき接続をプロ
グラムで随時識別し接続制御を行なう電子交換機に於い
て、ライン回路とトランク回路のそれぞれに個々の接続
状態を記憶する手段とマイクロプロセッサとを有し、呼
の状態変化が生起した際、主記憶メモリに記憶されてい
る接続状態を中央制御装置および前記マイクロプロセッ
サを介してただちに前記トランク及び前記ライン回路の
内部記憶手段に遷移させることを特徴とする呼情報退避
方法。
In electronic exchanges, the connection status of a call is stored in the main memory, and when a change in status occurs, a program identifies the next connection to be made at any time based on this connection status, and performs connection control. Each of the circuits has means for storing individual connection states and a microprocessor, and when a change in the call state occurs, the connection states stored in the main memory are transmitted via the central controller and the microprocessor. A call information saving method characterized in that the call information is immediately transferred to internal storage means of the trunk and the line circuit.
JP2403682A 1982-02-17 1982-02-17 Save method for call information Pending JPS58141063A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2403682A JPS58141063A (en) 1982-02-17 1982-02-17 Save method for call information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2403682A JPS58141063A (en) 1982-02-17 1982-02-17 Save method for call information

Publications (1)

Publication Number Publication Date
JPS58141063A true JPS58141063A (en) 1983-08-22

Family

ID=12127275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2403682A Pending JPS58141063A (en) 1982-02-17 1982-02-17 Save method for call information

Country Status (1)

Country Link
JP (1) JPS58141063A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6135696A (en) * 1984-07-27 1986-02-20 Nec Corp Holding and resuming method of connection call

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6135696A (en) * 1984-07-27 1986-02-20 Nec Corp Holding and resuming method of connection call
JPH0344718B2 (en) * 1984-07-27 1991-07-08 Nippon Electric Co

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