JPS58137289A - Hybrid integrated circuit - Google Patents
Hybrid integrated circuitInfo
- Publication number
- JPS58137289A JPS58137289A JP1820082A JP1820082A JPS58137289A JP S58137289 A JPS58137289 A JP S58137289A JP 1820082 A JP1820082 A JP 1820082A JP 1820082 A JP1820082 A JP 1820082A JP S58137289 A JPS58137289 A JP S58137289A
- Authority
- JP
- Japan
- Prior art keywords
- conductive rubber
- chip carrier
- circuit
- hybrid integrated
- pressure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明Fi混成集積回路に関する0
〔発明の技術的背景〕
電子−器上複雑化し、多機能化するためol!求中1省
資源化tはかることに対応して、混成集積回路を小形化
し高密度化することが急速に進行している・例えば回路
基板上の実装密度食上げるためにとられているセラiツ
クチツプキlヤリアタイプパッケージはICチップパッ
ケージングO改良手法である。[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to an Fi hybrid integrated circuit. [Technical Background of the Invention] In order to make electronic devices more complex and multifunctional, OL! In response to the need for resource conservation, hybrid integrated circuits are rapidly becoming smaller and more densely packed. Tsukuchipuki laria type package is an improved method of IC chip packaging.
とのセラミックチップキャリア會基板に実装する際、チ
ップキャリア電極と基板上導住との導通を異方導電性ゴ
ム、あるいFi感圧導電性ゴムによって得させることは
すでに知られている。この手法による実装工程の回路部
材配置管@1図イに、工程後に得られる成品回路断面図
を第1図口に示す0イ図て導体(3)が形成されている
回路基板(4)上でセラミックチップキャリアを実装す
る予定位置に、まず異方導電性ゴムあるいは感圧導電性
ゴムaat−配する0次にこの上にセラミックチップキ
ャリア(6)ヲチップキャリア電極(1)が対応するよ
うに配して、上方から加圧用のカバー(5)t−おき、
異方導電性ゴムあるいは感圧導電性ゴムを加圧しながら
全体を一体にしてセラミックチップキャリア會実装し四
回回路とするのである口
〔背景技術の問題点〕
この手刀は多種のICチップに適用でき、組立を容易に
し接触抵抗を比較的に小さくシ、信頼性の高い実*1−
可能にする・しかし加圧用のカバーを必要とするから、
高価で重く、実装の厚さt厚〈シ、またカバー1固定す
る部分が必要となるので!l!装密度を同ビン数のデュ
アルインツインパッケージの172@度までにしか高め
られない◎さらKICチップからの放熱は、チップと基
板との間に挾まれた異方導電性ゴムあるいけ感圧導電性
ゴム全通して基板へ行なわれるが、これらのゴムの熱伝
導率は1.3〜1.6X10 W/m−にであって小
さいから、この手力では回路の放熱性が悪い。It is already known that when mounting a ceramic chip carrier on a substrate, electrical conduction between the chip carrier electrode and the conductive layer on the substrate is achieved using anisotropically conductive rubber or Fi pressure-sensitive conductive rubber. The circuit component arrangement tube in the mounting process using this method is shown in Figure 1A, and the cross-sectional view of the finished circuit obtained after the process is shown in Figure 1A. First, place an anisotropic conductive rubber or pressure-sensitive conductive rubber (AAT) at the planned position where the ceramic chip carrier is to be mounted. Place the pressurizing cover (5) from above,
Anisotropic conductive rubber or pressure-sensitive conductive rubber is pressurized and the whole is integrated into a ceramic chip carrier to form a four-circuit circuit. [Problems in background technology] This technique is applicable to various types of IC chips. It is easy to assemble, has relatively low contact resistance, and is highly reliable.
possible, but requires a cover for pressurization,
It is expensive and heavy, the mounting thickness is too thick, and a part to fix the cover 1 is required! l! Packing density can only be increased to 172°C for a dual-in-twin package with the same number of bins.In addition, heat dissipation from the KIC chip is achieved through pressure-sensitive conductive rubber sandwiched between the chip and the board. The thermal conductivity of these rubbers is 1.3 to 1.6 x 10 W/m, which is small, so the heat dissipation of the circuit is poor with this manual method.
この発明の目的は、チップキャリア電極と回路基板導体
との接続管安価で、軽く、実装の厚さt薄く、実装密度
を高く、放熱性を良好にするように改良した混成集積回
路を提供することKある0〔発@011!寮〕
即ちこの発明は回路基板上の導体とチップキャリア電極
とO関に異方導電性ゴム或いは感圧導電性ゴムO何れか
ゴム材を挟在させ、この回路基板とチップキャリアとの
対向函の−1に接着剤層【おいて一体に形成された混成
集積回路にある0〔発@0*總例〕
工程後に得られる成品回路断面図を第2図口に示す・こ
の回路はチップキャリア(6)の電極(11と、この電
極管接続する予定の基板(4)上の導体(3)との間に
、枠型形状の異方導電性ゴムわるいFi感感圧導電性ゴ
ム管挟在させ、セラミックチップキャリア(6)裏面中
央部と基板とを接着剤(7)によシ接着されているもの
である◎この接着の際異方導電性ゴムあるいは感圧導電
性ゴムの導電方向厚さが約1〇−減少するように加圧し
、なから接着剤全硬化させるeこのことによってチップ
キャリア自身は加圧装置となり、館1図例で備えられた
加圧用カバーは不用となる0
〔発明の効果〕
このようなこの発明の回路ではチップキャリア実装は、
安価で軽く薄くさせることができ、さらに実装密度も従
来技術よシも30チ以上高めることができる0さらにI
Cチップから基板への放熱はチップキャリア裏面中央部
と基板とを接着している接着剤を通して行なわれ、接着
剤の熱伝導率は約tsxto W/cla−K であっ
て異方導電性ゴムあるいは感圧導電性ゴムの約10倍で
あるから、111図回路よシも5倍以上放熱性を良好に
する0An object of the present invention is to provide an improved hybrid integrated circuit in which the connecting tube between a chip carrier electrode and a circuit board conductor is inexpensive, lightweight, has a thin mounting thickness, has a high mounting density, and has good heat dissipation. KotoK is 0 [from @011! That is, this invention sandwiches a rubber material such as anisotropically conductive rubber or pressure-sensitive conductive rubber between the conductor on the circuit board and the chip carrier electrode, and forms a box facing the circuit board and the chip carrier. A cross-sectional view of the finished circuit obtained after the process is shown in Figure 2. This circuit is a chip carrier. Between the electrode (11) of (6) and the conductor (3) on the substrate (4) to which this electrode tube is to be connected, a frame-shaped anisotropically conductive rubber tube is sandwiched. The central part of the back surface of the ceramic chip carrier (6) and the substrate are bonded together using an adhesive (7). ◎During this bonding, the conductive direction of the anisotropically conductive rubber or pressure-sensitive conductive rubber is Pressure is applied so that the thickness is reduced by about 10 - and then the adhesive is completely cured. By doing this, the chip carrier itself becomes a pressurizing device, and the pressurizing cover provided in the example in Figure 1 becomes unnecessary. [Effects of the Invention] In the circuit of this invention, the chip carrier mounting is as follows.
It can be made inexpensive, light and thin, and the mounting density can be increased by more than 30 inches compared to conventional technology.
Heat dissipation from the C chip to the substrate is carried out through the adhesive that adheres the central part of the back surface of the chip carrier and the substrate, and the thermal conductivity of the adhesive is approximately tsxto W/cla-K, and is made of anisotropic conductive rubber or Since it is about 10 times that of pressure-sensitive conductive rubber, it also improves heat dissipation by more than 5 times as much as the 111 circuit.
第111イ並びに口及び第2図イ並びに口は従来及びこ
の発明の混成集積回路に係る実鉄工租の回路部材配置図
並びに成品回路断面図である0両図で
11)・・・チップキャリア電極、a2.(2’3・・
・異方導電性ゴムあるいは感圧導電性ゴム、(3)・・
・回路基板上の導体、(4)・・・回路基板、(5)・
・・加圧用カッ<−1(6)・・・チップキャリア、(
7)・・・接着剤。
代理人 弁理士 井 上 −男
第 1 口
第 2 因Figure 111A and Figure 2A and Figure 2A and Figure 2A and Figure 2A and 2B are circuit component layout diagrams and cross-sectional views of finished circuits of actual ironworks relating to conventional and present hybrid integrated circuits.11)...Chip carrier electrode , a2. (2'3...
・Anisotropic conductive rubber or pressure-sensitive conductive rubber, (3)...
・Conductor on circuit board, (4)...Circuit board, (5)・
... Pressure cup <-1 (6) ... Chip carrier, (
7)...Adhesive. Agent Patent Attorney Inoue - Male 1st person 2nd cause
Claims (1)
電性ゴム或いは感圧導電性ゴムの何れかゴム材t−挾在
させ、この回路基板とチップキャリアとの対向面の一部
に接着剤層tおいて一体に形成されていることを41黴
とする混成集積回路A rubber material, either anisotropically conductive rubber or pressure-sensitive conductive rubber, is sandwiched between the conductor on the circuit board and the chip carrier electrode, and is adhered to a part of the facing surface of the circuit board and chip carrier. A hybrid integrated circuit that is integrally formed in a layer t.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1820082A JPS58137289A (en) | 1982-02-09 | 1982-02-09 | Hybrid integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1820082A JPS58137289A (en) | 1982-02-09 | 1982-02-09 | Hybrid integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58137289A true JPS58137289A (en) | 1983-08-15 |
Family
ID=11964988
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1820082A Pending JPS58137289A (en) | 1982-02-09 | 1982-02-09 | Hybrid integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58137289A (en) |
-
1982
- 1982-02-09 JP JP1820082A patent/JPS58137289A/en active Pending
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