JPS58137178A - 記憶装置 - Google Patents

記憶装置

Info

Publication number
JPS58137178A
JPS58137178A JP57017310A JP1731082A JPS58137178A JP S58137178 A JPS58137178 A JP S58137178A JP 57017310 A JP57017310 A JP 57017310A JP 1731082 A JP1731082 A JP 1731082A JP S58137178 A JPS58137178 A JP S58137178A
Authority
JP
Japan
Prior art keywords
circuit
writing
address
address input
reading
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57017310A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6224878B2 (enrdf_load_stackoverflow
Inventor
Sumio Tanaka
田中　寿美夫
Shigeyoshi Watanabe
重佳 渡辺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57017310A priority Critical patent/JPS58137178A/ja
Publication of JPS58137178A publication Critical patent/JPS58137178A/ja
Publication of JPS6224878B2 publication Critical patent/JPS6224878B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
JP57017310A 1982-02-05 1982-02-05 記憶装置 Granted JPS58137178A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57017310A JPS58137178A (ja) 1982-02-05 1982-02-05 記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57017310A JPS58137178A (ja) 1982-02-05 1982-02-05 記憶装置

Publications (2)

Publication Number Publication Date
JPS58137178A true JPS58137178A (ja) 1983-08-15
JPS6224878B2 JPS6224878B2 (enrdf_load_stackoverflow) 1987-05-30

Family

ID=11940433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57017310A Granted JPS58137178A (ja) 1982-02-05 1982-02-05 記憶装置

Country Status (1)

Country Link
JP (1) JPS58137178A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09120689A (ja) * 1996-10-21 1997-05-06 Toshiba Corp 不揮発性半導体記憶装置
US6061271A (en) * 1987-06-29 2000-05-09 Kabushiki Kaisha Toshiba Memory cell of nonvolatile semiconductor memory device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6061271A (en) * 1987-06-29 2000-05-09 Kabushiki Kaisha Toshiba Memory cell of nonvolatile semiconductor memory device
US6269021B1 (en) 1987-06-29 2001-07-31 Kabushiki Kaisha Toshiba Memory cell of nonvolatile semiconductor memory device
JPH09120689A (ja) * 1996-10-21 1997-05-06 Toshiba Corp 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
JPS6224878B2 (enrdf_load_stackoverflow) 1987-05-30

Similar Documents

Publication Publication Date Title
US6181605B1 (en) Global erase/program verification apparatus and method
JPH02201797A (ja) 半導体メモリ装置
JPH0253879B2 (enrdf_load_stackoverflow)
JPS626494A (ja) 半導体記憶装置
US7626850B2 (en) Systems and devices for implementing sub-threshold memory devices
JPS5856199B2 (ja) 半導体記憶装置
JPH06259973A (ja) 連想記憶装置
JPS63285800A (ja) 半導体メモリ装置
GB1560367A (en) Data storage arrangements
CN116711013A (zh) 单端位线电流感测放大器
US5243569A (en) Differential cell-type eprom incorporating stress test circuit
US4338679A (en) Row driver circuit for semiconductor memory
EP0329177A2 (en) Semiconductor memory device which can suppress operation error due to power supply noise
TW479347B (en) Nonvolatile semiconductor memory device with reliable verify operation
JPS58137178A (ja) 記憶装置
KR940007000B1 (ko) 개선된 라이트 동작을 가지는 반도체 메모리 장치
US5101379A (en) Apparatus for page mode programming of an EEPROM cell array with false loading protection
US7286424B2 (en) Semiconductor integrated circuit device
EP1677309A2 (en) Memory device
KR970004816B1 (ko) 어드레스 천이 검출 회로를 내장하는 반도체 메모리 장치
JPH05217378A (ja) 半導体メモリ装置
EP0764952B1 (en) An apparatus and method for a data path implemented using non-differential current mode techniques
KR101201861B1 (ko) 반도체 메모리 장치의 데이터 마스크 동작 테스트 회로
JPH01264700A (ja) ダイナミック型半導体記憶装置
EP0459297B1 (en) Semiconductor memory device having transfer gate array associated with monitoring circuit for bit line pair