JPS58137021A - Reset circuit - Google Patents

Abstract

PURPOSE:To attain stable operation, by applying a reset input to a microcomputer system without fail even at momentary power failure. CONSTITUTION:When a power failure is detected at a power supply detection circuit 1, the microcomputer system 2 executes the program at power failure detection. After a time required for the system 2 to execute the program at the detection of stop with a delay circuit 5, the power failure detection signal is applied to a flip-flop 6 and reset, and the output discharges charges of a capacitor 4 connected to a reset input terminal 2b of the microcomputer system 2 through a resistor 8 with a driver 7 momentarily. Thus, even at the momentary power failure, the charge in the capacitor 4 is discharged without fail, and a reset input is inputted to a reset input terminal 2b of the microcomputer system 2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a reset circuit that prevents a microcomputer system from operating in an unstable manner even in the event of a momentary power outage of the power supply to the electronic circuit system.

A conventional electronic circuit system is shown in FIG. When the power supply detection circuit 1 detects a power outage, an interrupt request input is applied to the interrupt request input terminal 2a of the microcomputer system 2, and the microcomputer system 2 executes a program at the time of power outage detection.

Furthermore, when the power is turned on, there is a slight delay at the reset input terminal 2b of the microcomputer system 2 after the application of the DC power source E due to the resistor 3 connected between the DC power source E and the capacitor 4 connected between the ground. When the reset input is applied, the reset is released.

Now, considering a momentary power outage, the DC power supply E has a time constant and lags behind the power supplied to the normal power supply circuit, so the voltage of the DC power supply E gradually decreases after a certain period of time. Then, when the power supply voltage drops below the operable power supply voltage of each device in the microcomputer system 2, the power supplied to the power supply circuit is newly supplied, and the voltage of the DC power supply E begins to rise, and each device in the microcomputer system 2 When the power supply voltage returns to within the operating range of the device, the charge accumulated in the capacitor 4 connected to the reset input terminal 2b of the microcomputer system 2 is not discharged below vIL of the reset input, and the DC power supply E
No reset is required upon return. Therefore, the flip-flops, registers, etc. in each device in the microcomputer system 2 remain undefined, and the microcomputer system 2 starts operating, resulting in a malfunction.

The present invention has been made to eliminate the above-mentioned drawbacks of the prior art, and one embodiment thereof will be described below with reference to FIG. 2, with the same numbers assigned to the same parts as above.

In FIG. 2, when a power outage is detected by the power supply detection circuit 1, the microcon beater system 2 executes a power outage detection program. Here, the power failure detection signal is applied to the flip-flop 6 by the delay circuit 6 after the time required for the microconbeater system 2 to execute the program at the time of power failure detection, the flip-flop 6 is set, and its output is applied to the resistor by the driver 7. Pass through vessel 8,
Reset input terminal 2b of microcomputer system 2
The electric charge of the capacitor 4 connected to the capacitor 4 is instantly discharged. Therefore, even in the event of a momentary power outage, the charge in the capacitor 4 is always discharged, and a reset input is input to the reset input terminal 2b of the microcomputer system 2.

In FIG. 3, in order to reset the flip-flop 6 during normal power supply, the output of the power supply detection circuit 1 is passed through an inverter 9 to reset the clip-flop 6.

According to the present invention, even in the event of a momentary power outage, a reset input is always applied to the microcomputer system. It is possible to supply a stable electronic circuit system that does not cause any malfunction.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional electronic circuit system, FIG. 2 is a block diagram showing an embodiment of a reset circuit according to the present invention, and FIG. 3 is a block diagram showing an application example of the reset circuit according to the present invention. . 1...Power supply detection circuit, 2...Microcomputer system, 2b...Reset input terminal, 3...Resistor, 4...・Capacitor, 5...Delay circuit, 6...Flip-flop, 7...Driver, 8...
Discharge element (resistor). Name of agent: Patent attorney Toshio Nakao and one other person
1 m 1211 3 figures

Claims (1)

[Claims] Equipped with a power supply detection circuit, reset input terminal and DC power supply,
It is equipped with an electronic circuit system having a microcomputer system in which a resistor and a capacitor are respectively connected to the ground, and a delay circuit is connected to the output terminal of the power supply energization detection circuit, and a 7-lip circuit is connected to the output terminal of the delay circuit. Connect the set input terminal of the 70 tube, connect a driver to the output terminal of the flip 70 amplifier, and connect the discharge element of the capacitor between the output terminal of this driver and the reset input terminal of the microcomputer system. A reset circuit characterized by: