JPS5812761B2 - Isouhenchiyouki - Google Patents

Isouhenchiyouki

Info

Publication number
JPS5812761B2
JPS5812761B2 JP50148085A JP14808575A JPS5812761B2 JP S5812761 B2 JPS5812761 B2 JP S5812761B2 JP 50148085 A JP50148085 A JP 50148085A JP 14808575 A JP14808575 A JP 14808575A JP S5812761 B2 JPS5812761 B2 JP S5812761B2
Authority
JP
Japan
Prior art keywords
phase
output
modulation
frequency
noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP50148085A
Other languages
Japanese (ja)
Other versions
JPS5272146A (en
Inventor
高橋清明
森仁
大庭良平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP50148085A priority Critical patent/JPS5812761B2/en
Publication of JPS5272146A publication Critical patent/JPS5272146A/en
Publication of JPS5812761B2 publication Critical patent/JPS5812761B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0975Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation in the phase locked loop at components other than the divider, the voltage controlled oscillator or the reference clock

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Description

【発明の詳細な説明】 本発明は、フエイズロツクループ(PLL)を用いた位
相変調器に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a phase modulator using a phase locked loop (PLL).

一般にPLLは、第1図に示すように位相検波器1、ル
ープフィルタ2、電圧制御発振器(VCO)3から成る
ループより構成され、基準発振源である水晶発振器4の
出力位相にVCO3の出力位相を一致させる動作をなす
In general, a PLL consists of a loop consisting of a phase detector 1, a loop filter 2, and a voltage-controlled oscillator (VCO) 3, as shown in Figure 1. Make an action to match.

従って、水晶発振器4で搬送波の周波数を規定し、上記
ループ内へ変調信号成分を付加し得れば位相変調器を構
成できるので、VCO3から位相変調波を取り出すこと
ができる。
Therefore, if the frequency of the carrier wave is defined by the crystal oscillator 4 and a modulated signal component is added to the loop, a phase modulator can be constructed, and a phase modulated wave can be taken out from the VCO 3.

しかしながら、この際、VCO3から発生する雑音の抑
圧並びに変調直線性の改善等に留意しなければならない
However, at this time, attention must be paid to suppressing noise generated from the VCO 3 and improving modulation linearity.

本発明は上記事情に鑑みなされたもので、PLLを用い
て搬送波の周波数を安定化させる際に、VCOから発生
する雑音を抑圧してS/Nを改善し、且つ変調直線性を
改善して広帯域化を図った位相変調器を提供することを
目的とする。
The present invention was made in view of the above circumstances, and when stabilizing the frequency of a carrier wave using a PLL, suppresses noise generated from a VCO to improve S/N and improve modulation linearity. The purpose of this invention is to provide a phase modulator with a wide band.

以下、図面を参照しながら本発明を説明する。The present invention will be described below with reference to the drawings.

第2図は本発明の一実施例を示すブロック図である。FIG. 2 is a block diagram showing one embodiment of the present invention.

同図において、11は位相変調波における搬送波の1/
nの周波数で発振する水晶発振器、12は位相検波器、
13は位相検波器12の出力に変調信号を加える加算器
、14はループフィルタ、15はVCO,16はVCO
15出力を1/nに分周する分周器である。
In the figure, 11 is 1/1 of the carrier wave in the phase modulated wave.
A crystal oscillator that oscillates at a frequency of n, 12 a phase detector,
13 is an adder that adds a modulation signal to the output of the phase detector 12, 14 is a loop filter, 15 is a VCO, and 16 is a VCO.
This is a frequency divider that divides the frequency of the 15 output to 1/n.

ここで、位相検波器12による位相検波感度をKp、V
CO15の感度をKv、ループフィルタ14の伝達関数
をF(s)、水晶発振器11の位相をθi、分周器16
の出力位相をθ0、位相変調出力位相をΘ0、変調信号
をSi、VCCO15のPM雑音をNiとして、第2図
の系を制御系のブロツク線図で表わすと第3図のように
なる。
Here, the phase detection sensitivity by the phase detector 12 is Kp, V
The sensitivity of CO 15 is Kv, the transfer function of loop filter 14 is F(s), the phase of crystal oscillator 11 is θi, frequency divider 16
When the system of FIG. 2 is expressed as a block diagram of the control system, it becomes as shown in FIG. 3, assuming that the output phase of is θ0, the phase modulation output phase is Θ0, the modulation signal is Si, and the PM noise of the VCCO 15 is Ni.

この第3図のブロック線図から が成立するので、出力位相Θ0は、 と表わせる。From this block diagram in Figure 3 holds, the output phase Θ0 is It can be expressed as

この(1)式より出力位相Θ0は雑音の位相ΘN、搬送
波の位相Θc、変調信号の位相ΘSの三者の和になって
いることがわかるので、とすることができる。
From equation (1), it can be seen that the output phase Θ0 is the sum of the noise phase ΘN, the carrier wave phase Θc, and the modulated signal phase ΘS, so it can be expressed as follows.

そして、雑音、搬送波、変調信号の各ループ云達関数を
HN(S),Hc(S),Hs(S)とすれば、となる
If the loop propagation functions of noise, carrier wave, and modulated signal are HN(S), Hc(S), and Hs(S), then the following equations are obtained.

ところで、第2図におけるループフィルタ14を第4図
に示すように受動素子で構成すれば、その周波数特性は
、T1=(R1+R2)C,T2=R2・Cとして第5
図のようになる。
By the way, if the loop filter 14 in FIG. 2 is constructed of passive elements as shown in FIG.
It will look like the figure.

このループフィルタ14の伝達関数F(s)は、 であり、この(6)式を前記(4)式に代入すると下式
の如くなる。
The transfer function F(s) of this loop filter 14 is as follows. Substituting this equation (6) into the above equation (4) yields the following equation.

この際、Kp・Kv=Kとする。即ち、となる。At this time, Kp·Kv=K. That is, it becomes.

この搬送波のループ云達関数を分周器16の出力(θ0
)で考えると、(7)式より、 が得られる。
The loop transfer function of this carrier wave is the output of the frequency divider 16 (θ0
), we can obtain from equation (7).

この(8)式はループゲインが分周器16で1/nにな
ったというだけであるから、K/n=kとおき、且つ、 とおき、これらを(8)式に代入すると、となる。
Since this equation (8) simply means that the loop gain is reduced to 1/n by the frequency divider 16, by setting K/n=k and substituting these into equation (8), we get Become.

この(9)式は搬送波のループ伝達関数を示しており、
自動制御理論からωn,ξは夫々ループの性質を示して
いる。
This equation (9) shows the loop transfer function of the carrier wave,
From automatic control theory, ωn and ξ each indicate the nature of a loop.

又、(5)式より、となる。Also, from equation (5), it becomes.

このHs(S)は、前記(1)式及び(5)式より入力
信号Siに対する出力位相の伝達関数であるので入力信
号Siに対する出力位相の周波数応答は|Hs(jω)
|で表わすことができる。
Since this Hs(S) is the transfer function of the output phase to the input signal Si from equations (1) and (5), the frequency response of the output phase to the input signal Si is |Hs(jω)
It can be expressed as |.

第6図はこの周波数応答を示す図であり、ξ=√2/2
とし、縦軸に(10)式を変形した20log|(Kp
)/nHs(jω)|、横軸に角周波数ωをωnで正規
化したω/ωnをとったものである。
Figure 6 is a diagram showing this frequency response, where ξ=√2/2
and the vertical axis is 20log | (Kp
)/nHs(jω)|, and the horizontal axis represents ω/ωn, which is obtained by normalizing the angular frequency ω by ωn.

即ち、前記(1)式及び(5)式より、第6図は変調信
号に対する出力位相を示すものであるから本実施例によ
る位相変調器の変調周波数特性を示すものである。
That is, from equations (1) and (5) above, FIG. 6 shows the output phase for the modulated signal, and therefore shows the modulation frequency characteristics of the phase modulator according to this embodiment.

したがって同第6図に示す如く入力信号Siはループ帯
域内で平担な位相変調特性を得ることができる。
Therefore, as shown in FIG. 6, the input signal Si can obtain an even phase modulation characteristic within the loop band.

また、雑音改善量は(入力雑音)/(出力雑音)であり
、前記(3)式、(6)式からこの雑音改善量は、 となる。
Further, the noise improvement amount is (input noise)/(output noise), and from the above equations (3) and (6), this noise improvement amount is as follows.

第7図は、この雑音の改善量を示す図であり、20lo
g|1/(HN(jω))|=20log|1+1/(
jω)・(Kp・Kv)/n・(1+jωT2)/(1
+jωT1)|を縦軸に、角周波数を横軸にとったもの
である。
FIG. 7 is a diagram showing the amount of improvement in this noise.
g|1/(HN(jω))|=20log|1+1/(
jω)・(Kp・Kv)/n・(1+jωT2)/(1
+jωT1)| is plotted on the vertical axis and the angular frequency is plotted on the horizontal axis.

尚、同第7図に示すように、PLLにおいてはVCO1
5の変調信号云送帯域における雑音の位相偏移はループ
フィルタ14を変調信号云送帯域より狭帯域にしても、
PLL出力にはVCO3の雑音の位相偏移は何ら変化な
く出力され、改善されることはない。
In addition, as shown in FIG. 7, in the PLL, VCO1
Even if the loop filter 14 has a band narrower than the modulation signal transmission band, the phase shift of the noise in the modulation signal transmission band of No. 5 is as follows.
The phase shift of the noise of the VCO 3 is output to the PLL output without any change and is not improved.

さて、例えば、変調信号Si=Asinωt、ωL<ω
<ωH,ωN≧10ωHとすれば、第6図に示す如くω
L<ω<ωHの範囲でω/ωnは0.1以下となるから
変調周波数特性は一定(出力位相偏移は一定)となる。
Now, for example, modulation signal Si=A sin ωt, ωL<ω
If <ωH, ωN≧10ωH, then ω as shown in Figure 6
Since ω/ωn is 0.1 or less in the range L<ω<ωH, the modulation frequency characteristic is constant (the output phase shift is constant).

また、変調信号の云達関数を示す前記(10)式(変調
信号角周波数に対する出力位相偏移角周波数特性を示す
式)は、Hs(S)=Hs(jω),〔S=jω〕と表
わすことができる。
In addition, the above equation (10) indicating the advancement function of the modulation signal (the expression indicating the output phase shift angle frequency characteristic with respect to the modulation signal angular frequency) is expressed as Hs(S)=Hs(jω), [S=jω]. can be expressed.

そこで、本実施例では、IHs(jωL)l二IHs(
jcc>H)lとなるように、ωnを設定することによ
り、前述の例のようにωn≧10ωHを得ることができ
る。
Therefore, in this embodiment, IHs(jωL)l2IHs(
By setting ωn so that jcc>H)l, ωn≧10ωH can be obtained as in the above example.

更に、VCO15の雑音をωL<ω<ωHの範囲におい
て40dB以上改善する必要がある場合には、第7図に
示すように雑音改善量がωnの点より12d.B/OC
Tとなっているので、ωn≧10ωHとすることによっ
てωHにおける改善量40dBを得ることができる。
Furthermore, if it is necessary to improve the noise of the VCO 15 by 40 dB or more in the range of ωL<ω<ωH, the amount of noise improvement is 12 dB from the point of ωn as shown in FIG. B/OC
Since ωn≧10ωH, an improvement amount of 40 dB in ωH can be obtained.

即ち、本実施例の位相変調器12であれば、第6図及び
第7図に示す如く、ループ帯域を変調信号の帯域より十
分広くしておくことによりS/Nが良好となると共に、
周波数特性が平担な位相変調特性となる。
That is, in the phase modulator 12 of this embodiment, as shown in FIGS. 6 and 7, by making the loop band sufficiently wider than the band of the modulation signal, the S/N can be improved, and
The phase modulation characteristic has a flat frequency characteristic.

また、前記(10)式に示すように、変調信号の出力位
相偏移はn/(Kp)で一義的に定まるので、分周器1
6の分周比を大きくすれば出力位相偏移も大きくするこ
とができる。
Furthermore, as shown in equation (10) above, since the output phase shift of the modulation signal is uniquely determined by n/(Kp), the frequency divider 1
If the frequency division ratio of 6 is increased, the output phase shift can also be increased.

よって、分周器16を用いることで変調感度を増大させ
ることにより、位相検波器12の非直線性による変調非
直線性の劣下を防止できる。
Therefore, by increasing the modulation sensitivity by using the frequency divider 16, it is possible to prevent deterioration of modulation nonlinearity due to the nonlinearity of the phase detector 12.

以上説明したように本発明によれば、ループフィルタを
広帯域にし、変調信号伝送帯域よりもループ帯域を広げ
ることによって、VCOの雑音をPLL負帰還ループで
圧縮し、その雑音の出力位相偏移を改善することができ
る。
As explained above, according to the present invention, by making the loop filter wideband and making the loop band wider than the modulation signal transmission band, VCO noise is compressed by the PLL negative feedback loop, and the output phase shift of the noise is reduced. It can be improved.

また変調信号がループフィルタの前段で加算されるので
、変調信号周波数に対して出力位相偏移が一定となる位
相変調周波数特性を得ることができる。
Furthermore, since the modulation signal is added before the loop filter, it is possible to obtain a phase modulation frequency characteristic in which the output phase shift is constant with respect to the modulation signal frequency.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はPLLの基本構成を示すブロック図、第2図は
本発明の一実施例を示すブロック図、第3図は第2図に
おける系の制御系ブロツク線図、第4図は第2図のルー
プフィルタの回路構成図、第5図は第4図のループフィ
ルタの周波数特性図、第6図はループ伝達関数Hs(j
ω)の周波数応答特性図、第7図は雑音の改善量を示す
特性図である。 11・・・・・・水晶発振器、12・・・・・・位相検
波器、13・・・・・・加算器、14・・・・・・ルー
プフィルタ、15・・・・・・電圧制御発振器、16・
・・・・・分周器。
FIG. 1 is a block diagram showing the basic configuration of the PLL, FIG. 2 is a block diagram showing an embodiment of the present invention, FIG. 3 is a control system block diagram of the system in FIG. 5 is a frequency characteristic diagram of the loop filter in FIG. 4, and FIG. 6 is a diagram of the loop transfer function Hs(j
FIG. 7 is a characteristic diagram showing the amount of noise improvement. 11... Crystal oscillator, 12... Phase detector, 13... Adder, 14... Loop filter, 15... Voltage control Oscillator, 16.
...Frequency divider.

Claims (1)

【特許請求の範囲】[Claims] 1 電圧制御発振器と、この電圧制御発振器出力の一部
を分周する分周器と、この分周器出力と基準発振器出力
との位相比較を行なう位相検波器と、この位相検波器出
力に変調信号を加える加算器と、前記変調信号の帯域よ
りも十分広帯域な通過特性を有し前記加算器出力を前記
電圧制御発振器へ伝達するループフィルタとを具備し、
上記電圧制御発振器から位相変調出力を得るようにした
ことを特徴とする位相変調器。
1. A voltage controlled oscillator, a frequency divider that divides a part of the voltage controlled oscillator output, a phase detector that performs a phase comparison between the frequency divider output and the reference oscillator output, and a phase detector that performs modulation on the phase detector output. comprising an adder that adds a signal, and a loop filter that has a pass characteristic sufficiently wider than the band of the modulation signal and transmits the output of the adder to the voltage controlled oscillator,
A phase modulator characterized in that a phase modulation output is obtained from the voltage controlled oscillator.
JP50148085A 1975-12-12 1975-12-12 Isouhenchiyouki Expired JPS5812761B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50148085A JPS5812761B2 (en) 1975-12-12 1975-12-12 Isouhenchiyouki

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50148085A JPS5812761B2 (en) 1975-12-12 1975-12-12 Isouhenchiyouki

Publications (2)

Publication Number Publication Date
JPS5272146A JPS5272146A (en) 1977-06-16
JPS5812761B2 true JPS5812761B2 (en) 1983-03-10

Family

ID=15444888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50148085A Expired JPS5812761B2 (en) 1975-12-12 1975-12-12 Isouhenchiyouki

Country Status (1)

Country Link
JP (1) JPS5812761B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59219576A (en) * 1983-05-17 1984-12-10 ジエイムズ・ウオ−カ−・アンド・カムパニ−・リミテツド Shaft sealing device
JPS62136661U (en) * 1986-02-21 1987-08-28
JPS63106962U (en) * 1986-12-29 1988-07-11
JPH054620Y2 (en) * 1986-12-29 1993-02-04

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52103946A (en) * 1976-02-25 1977-08-31 Sumitomo Electric Ind Ltd Frequency stabilization circuit
WO1986005452A1 (en) * 1985-03-14 1986-09-25 Izumi Corporation Industries, Inc. Steering apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS535503A (en) * 1976-07-02 1978-01-19 Matsushita Electric Ind Co Ltd Tv tuner

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS535503A (en) * 1976-07-02 1978-01-19 Matsushita Electric Ind Co Ltd Tv tuner

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59219576A (en) * 1983-05-17 1984-12-10 ジエイムズ・ウオ−カ−・アンド・カムパニ−・リミテツド Shaft sealing device
JPS62136661U (en) * 1986-02-21 1987-08-28
JPS63106962U (en) * 1986-12-29 1988-07-11
JPH054620Y2 (en) * 1986-12-29 1993-02-04

Also Published As

Publication number Publication date
JPS5272146A (en) 1977-06-16

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