JPS58125830A - Plasma etching method - Google Patents

Abstract

PURPOSE:To inhibit the temperature rise of a substrate to be processed to predetermined value or less, and to enable etching in high power density by intermittently applying high-frequency power to a parallel plate type electrode and etching the substrate by plasma. CONSTITUTION:A dummy is fixed onto a target electrode first, high frequency power is applied under predetermined conditions, and the application is stopped at the cloudy point of a positive resist, a prescribed time is obtained, and time for which the substrate is cooled up to a predetermined temperature is acquired. Accordingly, power applying time is shortened while using the degenerating point of the resist as a reference, the temperature of the substrate to be processed is regulated, the process is repeated according to a prescribed manner by using the dummy, and an etching profile until n times in actual processing is prepared. High-frequency power is applied intermittently according to the etching profile prepared, the substrate is etched and the temperature rise of the substrate is prevented in actual plasma etching. Accordingly, the deformation and degeneration of a resist mask are prevented, and the yield of a device with a minute pattern can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a plasma etching method using an etching apparatus f:J@ for a parallel plate lid, and in particular to etching an insulating film using a parallel etching apparatus f:J@. Background of the Technology As an etching method for forming a fine pattern T** well, a plasma etching method using an etching device with a parallel plate lid is the best. And Parallel flat 1IjL1i
A typical plasma etching method is a reactive ion etching method. This reactive φ
Are you familiar with the Ion fist etching method at 11? l 0.5
(W, An) Etching is performed at a low power of 5 degrees, or electrode windows are formed in the insulating film of 9-phosphorus silicate glass (P2O) in silicon dioxide (StO,) during the manufacturing process of semiconductor devices. When etching insulating metals, the low power etching has the following problems.

That is, when etching the electrode window of the insulating film, carbon tetrafluoride (CF4) and methane trifluoride (CHF) are used to increase the selectivity between the insulating film and the underlying silicon (Sl) layer.
Etching gases mixed at a ratio of about 1 :1 are used. In this case, the low power reactive
When ion etching is performed, a carbon polymer produced by the reaction of the etching gas adheres to the surface to be etched, that is, the insulating film, and the etching rate is significantly reduced. This is a phenomenon in which the carbon polymer also adheres to the surface of another layer exposed within the electrode window, deteriorating the contact characteristics of the electrode. As a means to prevent this phenomenon, the etching strength is increased with oxygen (
There is also a method of mixing 0 and 1, but this increases the ashing rate of the resist and deforms the resist mask pattern, resulting in poor electrode window formation accuracy.

(c) Conventional technology and problems Therefore, using reactive ion etching method! 8
When etching a piece, the high frequency power that is conventionally applied is increased several times the above-mentioned value, for example, about 2 to 3 CW/d).
By forming a high-density plasma tube and increasing the etching intensity, the carbon polymer can be prevented from depositing on the insulating film and the 81 layer, thereby significantly reducing the substrate and temperature to be treated (e.g. The photoresist pattern formed on the substrate to be processed as an etching mask is melted and deformed or altered in quality. The deformation of the photoresist pattern changes the size and shape of the electrode window formed in the insulating material, leading to a decline in the performance of the semiconductor device, and the deformation of the photoresist pattern also reduces the peelability of the photoresist pattern. There is a problem in that the manufacturing yield of semiconductor devices is lowered.

(d) Purpose of the Invention The purpose of the present invention is to perform high power density plasma etching while suppressing the temperature rise of the substrate to be processed to a predetermined temperature or less in a plasma etching method using a parallel plate type etching iron apparatus. A method is provided to eliminate the above problems.

(・) Structure of the Invention In other words, the present invention provides a plasma etching method using a parallel plate etching apparatus which has means for cooling a target electrode and means for adhering a substrate to be processed onto the target electrode. The feature is that etching is performed by applying

(f) Examples of the Invention The following qt-etching examples of the present invention are shown in a schematic sectional view of an etching apparatus shown in FIG. 1, a schematic sectional view of a dummy substrate to be processed shown in FIG. N2, and FIGS. This will be explained in detail using the etching profile creation process diagram shown in (c).

The parallel plate type plasma etching apparatus used in the method of the present invention has a normal structure, for example, as shown in FIG. An etching chamber 6 is formed by a pelger 5 having a gas intake 3 and a vacuum exhaust port 4, a cooling water circulation device #47 is provided at the bottom of the etching chamber 6, and a DC high voltage electrode is installed on the upper surface. A plate-shaped target electrode 9 on which a well-known electrostatic chuck 8, which is embedded in an insulator and is fixed, is supported by a column 10 penetrating through the base 1, and the target A counter electrode 12 on a flat plate supported by struts 11 of stripes 2 passing through the Pelger 5 on the top of the electrode 9
are arranged in parallel. For example, an insulating Mt- is provided on the semiconductor substrate, and a 7-photoresist is provided on the insulating film.
Substrate 13 to be etched (etched) on which a mask is formed
t- The electrostatic chuck 8 is electrostatically tightly fixed, and while a predetermined etching gas is introduced from the gas inlet 3 through a predetermined floor cover, a predetermined exhaust is performed from the vacuum exhaust port 4, and the etching chamber 6 is Inside, while maintaining a constant etching gas pressure, a predetermined high frequency high power (RFtj k mark) is applied between the target electrode 9 and the opposing electrode 12, and the opposing electrode liI is grounded.
), high-density plasma 14 is applied between the target electrode 9 and the counter electrode 12 to perform active ion etching of the insulating film.

In the above-mentioned etching apparatus, the substrate 13 to be processed, whose temperature has risen due to the collision of etching gas ions and radicals formed in the high-density plasma 14 during etching, is cooled via the electrostatic chuck 8 and the target electrode 9t. However, when continuous etching is performed for a long time at a high power density of about 2 to 3 [W/, id), the saturation temperature is 30
In the method of the present invention, a dummy substrate to be processed that is formed in almost the same shape as the substrate to be processed that will become a product is used, and for example, according to the following procedure, the dummy substrate is opened when power is applied. The entire cooling time is determined, and the substrate to be processed, which will become the product, is etched according to the etching profile, and the temperature rise is suppressed to below a predetermined temperature. FIG. 2 schematically shows a cross section of a dummy substrate to be processed. In the figure, 15 is a silicon (81) substrate with a predetermined diameter and thickness, and 16 is a phosphor layer with a predetermined thickness. A silicate glass (PSG) film 17 has a predetermined thickness (for example, positive resist).

That is, first, the above-mentioned dummy substrate to be processed is fixed to the electrostatic chuck L of the target electrode, and predetermined etching conditions such as etching gas 0.3 (Torr) (CFI 10 CHF) are applied.
13.56 [delivery h] High frequency power density 2 [w/c
- Under the conditions of d), first apply power for the first time, stop the power when the surface of the positive resist film becomes cloudy, measure the time during this period, and then adjust the temperature of the substrate to be processed to a specified level. For example, the temperature of 80 ("CJ" is measured for the entire cooling time, and a temperature profile diagram as shown in Figure 3 (&) is created. In the diagram, 'I'll is the initial temperature, '
I'+2 is the resist alteration point @f (1 for positive resist)
The cooling temperature IL (50 (°C) in this example) is approximately 50 (°C).
O(-C)), 1. is the first power application time, C1 is 1
Indicates the second cooling time. And 1. For example, the time t+'(temperature T11')'Ky corresponding to 80 [≠] is determined as the first power application time in the actual processing. Here, since the temperature of the substrate to be processed during power application is actually difficult, it is defined by shortening the power application time using the resist deterioration point as a reference as described above. Next, using a new dummy substrate,
Following the first power application time Ll' + cooling time C1, the second power application was performed until resist deterioration.
The temperature profile shown in FIG. 3(b) is created by cooling the resist to J, and the second power application time t! is reached until the resist deterioration temperature T22 is reached. (80C%) is defined as the second power application time t, I in actual processing. In the figure, C1 is the second cooling time + Tel is the cooling temperature, 5o (C).

Ttt' indicates the temperature of the substrate to be processed at t and L. Next, using a dummy branch-treated substrate that had been previously treated, the first power application and cooling as specified above, the second power application and cooling, and the third power application and cooling were performed in the same manner as described above. The temperature profile shown in Figure (c) is created, and the third power application time 1 in the actual process is as described above.
,/and cold stuffiness time C, t-determine. In addition, Figure 3 (c
), TH is the resist deterioration temperature.

Ta11 is the cooling temperature + tl is the third power application time until resist deterioration + +[, l/ is the temperature of the substrate to be processed at T,'. Thereafter, etching profile profiles up to the nth time in actual processing are created using a dummy substrate in the same manner. In the plasma etching method of the present invention, etching is performed by intermittently applying high frequency power according to the etching profile created using the dummy substrate. In the above embodiment, a positive resist was used as the mask material, but the present invention can also be applied when deteriorating a negative resist as a mask material.However, in this case, the temperature at which deformation occurs (
Although the etching profile is determined based on the etching temperature (170 to 180° C.), the present invention can also be applied to parallel plate-plasma etching other than reactive ion etching such as spot etching.

(g) As described in detail, according to the present invention, it is possible to suppress the temperature rise of the substrate to be processed during plasma etching at Parfous density. This prevents deformation and deterioration of the resist mask, making it easier to copy and extract, especially in ion etching, etc., which uses high-power density FFIG to form electrode windows on insulating films on semiconductor substrates. The performance and manufacturing efficiency of semiconductor devices with butter can be improved.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram of an etching apparatus used in an embodiment of the present invention. yT plane view, the second figure is a dummy treated object used in one embodiment of the present invention, and a schematic diagram of the elm board. It is a two-dimensional diagram of the etching profile creation process. In the figure, y indicates 1 is the base, 2 is the vacuum gasket, 3 is the gas inlet, 4 is the vacuum exhaust, and 0.5 is the Pelger. 6 is etching ¥, 7 is 6mm V water circulation machine oval, 8 is electrostatic chuck, 9 is target % yearning, 10.11 is support. 12 is a counter electrode, and 13 is a substrate to be etched (etched). 14 is high-density plasma, 15 is silicon substrate, 16 is silicate glass metal, 17 is positive resist metal, RF is high frequency power, G#i grounding, TiI is initial temperature e TH*T
, *T'am is resist alteration point temperature* T+ *Ts
e Ts is the power application time for the 1st, 3rd, and 3rd time until resist deterioration e j1'* jl'@t@'
is the power application time of 111@, 111th, and 3rd WA in actual processing, and C, , C, , C is 1 time. 2iI@, indicates the cooling time of all eyes. Chapter) Kasumi

Claims (1)

[Claims] In step 11, etching is performed by intermittently applying high frequency power to a plasma etching method using a parallel 10*ai etching apparatus having means for cooling the target electrode and means for attaching the substrate to be processed onto the target electrode.tII
II Plasma etching method using mold.