JPS58125176A - Self-correlation coefficient generator - Google Patents

Abstract

PURPOSE:To exactly obtain a self-correlation coefficient of an optional number of degree, which is normalized by a self-correlation coefficient of ''0''-degree, by a simple circuit configulation, by constituting a correlation coefficient generator without providing a dividing circuit. CONSTITUTION:A signal X(n) supplied to an input terminal 100 is delayed by a delaying circuit 101 and becomes a signal of X(n-i), also, when an output signal of a coefficient generating circuit 501 is denoted as ri(n), an output signal of an adder 301 becomes X(n)-ri(n).X(n-i), an output signal of a coeffient correcting circuit 401, namely, an output signal of an attenuator is shown by DELTA{X(n)-ri(n).X(n-i)}.X(n-i), and accordingly, the output signal ri(n) of the coefficient generating circuit 501 is corrected to the expressionIin the following time slot. In this case, when DELTA is set suitably, ri(n) is corrected in order, and is converged to a value of the expression II. Since a mean value of the sum can be replaced with the sum of a mean value, the expression II becomes the expression III, and to output terminals, 601, 602,-60n, primary, secondary -(n)- degree self-correlation coefficients which have been normalized by a self-correlation coefficient of ''0''-degree are outputted, respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an autocorrelation coefficient generator for determining an autocorrelation coefficient.

[Technical background of the invention]

The autocorrelation coefficient is used in various signal processing, and is also an effective method for detecting the approximate periodicity of a signal, for example. Furthermore, as a linear predictive coding method (LPC), an autocorrelation coefficient is also required when calculating a parameter representing a spectrum envelope in a speech analysis device.

In these various types of signal processing, the autocorrelation coefficient often requires a value obtained by normalizing the zero-order autocorrelation coefficient a(0) to 1. In the above example, if it is used as a means to detect the approximate periodicity of a signal, it is only necessary to search for the peak value of the autocorrelation coefficient, so there is no need to normalize it to fL(0)-1, but linear prediction Normalized values are required when performing speech analysis using encoding methods.

FIG. 1 shows an example of a conventional autocorrelation coefficient generator, which is capable of obtaining first to nth order autocorrelation coefficients normalized by a zeroth order autocorrelation coefficient. In the figure, 10 is an input terminal, 11, 12...1n is a delay circuit, 21
, 22. -2fi is a multiplier, 31, 32. -3n is Aki, Mureta, 41, 42.・4fi is a division circuit,
51, 52...5n are four outputs.

In FIG. 1, signals supplied to input terminal 10 are transmitted to delay circuits 11, 12 . . . 1n is sequentially delayed by 1 time slot, and the product with the input signal is multiplied by 1 multiplier 21.22, .
...3n, the average value of an appropriate time interval is calculated.

The input signal is also squared in the multiplier 20 and the average value of the appropriate time interval is multiplied in the accumulator 30.

Here, accumulators 30, 31 . ... 3n is for taking an hourly average, and can be replaced with a device that performs time integration such as a low frequency waveform generator. 0th-order, 1st-order, . Furthermore, in order to normalize with the zero-order autocorrelation coefficient, IC, Aquita 31
．． 32.・The output signal of -3n is sent to the divider 41.42.・4
n J (lead, Aki, divided by the signal from the muleta 30 and guided to the output terminals 51, 52... 5n. Thus, from the output terminals 5L, 52t... 5n, each with a zero-order autocorrelation coefficient It is possible to obtain normalized first to nth order autocorrelation coefficients.

[Problems with background technology]

By the way, when this correlation coefficient generator is specifically constructed, the scale of the division circuits 4142, . In the case of division, when the number of lines approaches Ol,
This is because the output signal may overflow, and a specific hardware configuration is not easy.

The necessity of division in the correlation coefficient generator is a major hindrance, especially when attempting to configure this device with an LSI.

[Purpose of the invention]

The present invention was made to solve the above-mentioned situation, and aims to provide a simplified autocorrelation coefficient generator that does not require division.

[The key to the invention]

This invention includes a delay circuit 1 multiplier, adder, coefficient generation circuit,
A characteristic feature of the present invention is that the autocorrelation coefficient generator is configured without the need for a coefficient correction circuit or a division circuit.

[Young fruit of invention]

According to the present invention, since no divider is required, it is possible to accurately obtain an autocorrelation coefficient of any order normalized by a zero-order autocorrelation coefficient with a simple circuit configuration.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the 71st page. In Figure 2, 8 and 100 are input terminals, 101, 102・1
0n is a delay circuit, 201, 202. ...20n is a multiplier, 301°302.-3On is an adder, 401.
402. ...40n is a coefficient correction circuit, 501,50
2. -・-5On is a coefficient generation circuit, 601, 602...
・60n indicates an output terminal.

The signal supplied to the input terminal 100 is sent to the delay circuit 101゜1.
02, . . . 101 m, and are sequentially delayed by 1 time V′-, and then the multipliers 201, 202 . ...2
Guided by 0n.

Here, coefficient generation circuits 501, 502. . . . 50n is multiplied by the coefficient supplied from the adder 301, 3.
02. ...Supplied to 30 Peng.

In the adder 301302...30f1 i, the signal supplied to the input terminal 16G and the multiplication 4eB 201
, 202. ...20m output signal is calculated, and the result is applied to coefficient correction circuits 401, 402.・・・
・Lead to 40n.

Delay circuits 101, 102. ...Ion's output signal is 1
Multipliers 201, 202 .・In addition to 20n, coefficient correction circuits 401, 402 . 4011, coefficient correction circuits 401, 402 . ...40n is this delay circuit 101
．． 102. ...signal supplied from ton and adder 3
01.302. . . 39n, and adders 301, 302 . . . . in the direction in which the output signal of 3Qn becomes smaller. ...
Modify the output signal of 50n.

In this case, for example, the i-th coefficient correction circuit 40i and the coefficient generation circuit 50 may have a configuration as shown in FIG.

In FIG. 3, the coefficient correction circuit 40i is composed of a multiplier 41i and an attenuator 42i, the coefficient generation circuit 50 is composed of an adder 51 and a delay element 521, and no divider is used.

Multiplication 1541i is the output signal of delay circuit 101 and adder 3
Calculate the product of the output signals of oi and send this signal to the attenuator 42i
After multiplying by 6, the signal is supplied to addition a511 as a coefficient correction signal. The adder 511 adds the coefficient modification signal supplied from the attenuator 421 to the current coefficient obtained as the output of the delay element 524, and supplies it to the input terminal of the delay element 521 to output the coefficient correction signal to the input terminal of the delay element 521 in the first time slot. The modified coefficients are obtained as the output of 521.

In this case, the signal supplied to the input terminal 100 is
Then, the output signal of the delay circuit 10M is expressed as x(ni). Further, if the output signal of the coefficient generation circuit 50, that is, the output signal of the delay element 521 is rt(n), then
The output signal of the adder 30i is x(n)-γ, (n)su(ni-i)...
(1) The output signal of the coefficient correction circuit 40i, that is, the output signal of the attenuator 42, is Δtx(n)−rl(n)su(n−ri)・x(n−4)
.
r&(n)"!(t1))"x(n-i)...
−・−・−・−・−・・・・・・・・・・・・・・・＋3). If Δ is set appropriately, ri(1m) is successively modified as (x(n)−rl(n)・x(n−4))・(x(n−
f) converges to the value −ζ of 1mo −(4) (where x(n) represents the time average value of x(s)). Since the average value of the sums is replaced with the sum of average values, equation (4) becomes You can find the number.

Therefore, the output terminals 601, 602...604ζ are linear, quadratic, and
-・The first-order autocorrelation coefficient is output.

At this time, the order of the autocorrelation coefficient output to the output terminal 60i is determined by how much time delay the signal from the delay circuit 101 input to the multiplier 120i has with respect to the original signal applied to the input terminal 100. determined by what you do.

As described below, the autocorrelation coefficient generator according to the present invention uses a simple circuit configuration that does not require a divider to generate an autocorrelation coefficient of any order normalized by a zero-order autocorrelation coefficient. This is something that can be obtained.

Furthermore, if the input signal is a stationary signal, the accuracy of the autocorrelation coefficient can be increased by reducing the gain of the attenuator 424; if the input signal characteristics change over time, , its rate of change I is attenuated according to i 42
The convergence speed can also be increased by increasing the gain of j.

[Other embodiments of the invention]

It should be noted that the present invention is not limited to the above-mentioned embodiments, and can be implemented with appropriate modifications within the scope without changing the gist.

For example, if only the autocorrelation coefficient of delay time τxmf is desired, the above-described process can be applied only to the input signal delayed by T. Also.

If you want the autocorrelation coefficient between τ = τ~T, you only need to apply the above processing to the output of that delay circuit.Furthermore, the coefficient correction circuit 401 * 402 ・"= 4
0n 41i 113 The configuration shown in FIG.

In this case, for example, when the signal obtained from the adder 304 is positive, the signal supplied from the delay circuit 101 is added as is, and when the signal obtained from the adder 30i is negative, the signal supplied from the delay circuit 10i is added. The sign is inverted and supplied to the capital reducer 42i.

Strictly speaking, the output signal ri (In) of the coefficient generation circuit 50i is as follows.

Although it converges to a value slightly different from the first-order autocorrelation coefficient,
This difference is negligible in most cases. As in this configuration, the code converter 431 multiplies a411
By substituting , the circuit scale of the autocorrelation coefficient generator can be further simplified.

As described above, there is no problem in practical use as long as the coefficient correction circuit 40i generates a correction signal in a direction in which the output signal value of the adder 30i becomes smaller.

Furthermore, the autocorrelation coefficients output to the output terminals 601, 602, . . . OQn vary slightly every l sample time.

A time average of the signals obtained at the output terminals 601, 602, . . . , 60rj may be used as the autocorrelation coefficient.

Furthermore, one multiplier 2012 per real mlζ of this invention
02...200 or adders 301, 302...
A circuit such as 30n can also be configured with one adder for each power by performing time division processing.

[Brief explanation of drawings]

Figure 1 is a schematic circuit diagram of an example of a conventional autocorrelation coefficient generator, Figure 2 is a schematic circuit diagram of an embodiment of the present invention, and Figure #13 is a coefficient generation circuit in the same embodiment. FIG. 4 is a circuit diagram showing a modified example of the coefficient correction circuit. 10: Input terminal o, t2-to: Delay circuit 21
．． 22...2n: Multiplier 31.32...3n: Accumulator 41, 42...
・4n: Division circuit 51.52...5n: Output terminal 100: Input terminal 101.102-1011: Delay circuit 201.20
2...20n = Multiplier 301.302...30n = Adder 401.402...40n: Coefficient correction circuit 501.5
02...50n: Coefficient generation circuit 601.602...
60n = Output terminal 4ti: Multiplier 42nd: Attenuator 51st = Adder 52i: Delay element 43i:
Code converter 1 Fig. 2 60+ On 434- Fig. 3 0i Fig. 4 0i

Claims (3)

[Claims] (1) A delay circuit that delays an input signal by a predetermined time, a multiplier that multiplies the output signal of this delay circuit by a coefficient supplied from a coefficient generation circuit, and a sum of the input signal S and the output of this multiplier, or an adder for taking a difference, an output signal of this adder and an output signal of the delay circuit are supplied, and a coefficient is supplied from the coefficient generation circuit to the multiplier in a direction in which the output signal of the adder becomes smaller. An autocorrelation coefficient generator characterized by comprising a coefficient correction circuit for correcting. (2) The coefficient correction circuit consists of a multiplier and an attenuator,
2. The autocorrelation coefficient generator according to claim 1, wherein the coefficient generation circuit comprises an adder and a slow grinder. (3) Claim 1, characterized in that the coefficient correction circuit is composed of a code converter and an attenuator.
Autocorrelation coefficient generator as described in section.