JPS5812337A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a walled emitter type semiconductor device generating no emitter-collector short-circuit in emitter formation by a method wherein a base region is newly formed by newly contacting the base region and an isolated oxide film after forming the base region. CONSTITUTION:As shown in drawing (c) the surface of a silicon oxide film 15 is covered with a photoresist and boron ions 22 are implanted into the photoresist and the second P type region 23 having impurity density which is almost equal to that of the above base region 20 is formed beneath a bird's beak 16. In order to form the P type region 23 meeting the above condition, implantation of the boron ions 22 is done with high acceleration energy or with much dose amount to form the P type region 23. As shown in drawings (e) and (f), an electrode 26 is formed on an emitter region 25 and electrodes 27, 28 are also formed on the base region 20 and a collector region 8 to obtain this inventive walled emitter type semiconductor device.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device in which elements are separated by an oxide film, and particularly relates to a so-called walled edge ζ in which the edges of the vine regions are in contact with the isolation oxide film.

/ (walled emitter) structure with high precision,
It relates to a method of forming with good reproducibility.

In the case of a semiconductor device with a conventional walled emitter structure, when forming an emitter, short circuits or breakdown voltage drops in the collector frequently occur in the vicinity of the electrical conductor, in other words, near the isolation oxide film, and semiconductor devices with the above structure have problems with reproducibility. There was a drawback that it could not be provided well.

According to the present invention, after forming the space region, a second base region is formed that includes the isolation oxide film side surface portion and the space region KIIL, and has the same impurity concentration and junction depth as the base region. By doing this, the width of the pace after the formation of the electric pipe is approximately equal between the central part and the peripheral part of the electric pipe9, which makes it possible to prevent short circuits between the emitter, the collector and the collector.
A wall-mounted semiconductor device can be obtained with good reproducibility and accuracy.

That is, the present invention provides a structure including at least a semiconductor substrate of a conductivity type and a semiconductor layer of an opposite conductivity type formed on the semiconductor substrate, typically a single crystal layer, in which a single crystal gold ring of the opposite conductivity type is surrounded. , and a step of forming an insulating layer extending to the - conductivity type semiconductor substrate and separating the opposite conductivity type single crystal layer into islands, and at least a portion of the single crystal layer separated into islands. forming a first one-conductivity type region in contact with the insulating layer; and implanting ions near the boundary between the insulator layer and the second conductivity type region to contact the insulator layer and the first region; A method of manufacturing a semiconductor device, comprising at least a step of forming a second one-conductivity type region and a tube bundle.

FIG. 1(a) is a plan view of the conventional walled emitter type semiconductor device described above, showing an isolation oxide film 1, a collector contact 2. The base contact 3 and the emitter 4 are in contact with each other at their peripheral parts. A cross-sectional view taken in the direction of the broken line 5 is shown in FIG. are separated from each other into islands.

The base region 9 is formed so that its peripheral portion is in contact with the isolation oxide film 1, and the surface of the space region is covered with the oxide film 1o.

Next, as shown in FIG. 1(C), an opening In is formed in the oxide film 10.
and form an emitter region 12. When the emitter is formed, the base width becomes narrower at the periphery than at the center. The reason for this is thought to be that the depth of the paste junction is shallow at the periphery, that the stress due to isolation oxidation is large at the periphery, and that the emitters and impurities are diffused deeper than in the center.

FIG. 1 (dl#i) shows an enlarged cross-sectional view of the vicinity of the isolation oxide film in FIG. The junction depth is larger than that of PACE 9, and conduction short circuit between emitter 12 and collector 8 easily occurs.

The present invention overcomes these drawbacks of the conventional method.

Hereinafter, the present invention will be described in detail along the manufacturing process.

First, as shown in FIG. 2(1), a highly doped N-type region 7t is selectively formed on the surface of a P-type single crystal semiconductor substrate 6.
Subsequently, a layer with a thickness of 0.5 mm is deposited on the substrate 6 and the heavily doped N-type region 7.
An N-type epitaxial layer 8 with a thickness of 5 to 3 μm is formed, and then a silicon oxide film 13 and a silicon nitride film 141″ are deposited on the surface of the epitaxial layer 80, and then the silicon nitride film 14 and the silicon oxide film 13 are selected. to remove the
A highly doped N-type silicon oxide layer 151'' reaching the region 7 and the P-type single crystal substrate 6 is formed in the selectively removed region, and the N-type epitaxial layer 8 is separated from each other in an island shape.

The silicon oxide layer 15 is formed by high-pressure oxidation at 900° C. to 1100° C. and 2 to 10 atmospheres.

At the time of this oxidation, bird'5b is formed directly under the silicon nitride film 14.
An eak region 16 is formed.

Next, as shown in FIG. 2(b), the silicon nitride film 14 is removed and the N-type epitaxial layer 80 has a 500 to 5000
A silicon oxide film 17t of λ is formed. The silicon oxide film 17
Naturally, the bird's be'ak region 16 is also oxidized during the formation of the silicon oxide film, and the silicon oxide film thickness in the region 16 also increases. Subsequently, bird's beak region 16 and silicon oxide film 1 are formed.
Areas other than the surface of 7 are covered with gold photoresist 18, boron ions 19 are implanted, and bird's beak l
6 and a P-type base region 20t directly under the silicon oxide film 17.
- form.

As the silicon oxide film of the bird's beak 1 5 becomes thicker as it approaches the interconnection isolation oxide film 15, the junction depth of the P-type base region 20 also becomes shallower.

Next, as shown in FIG. 2(C), silicon oxide films 15 and 1
70 surface is covered with a photoresist 21, boron ions 22 are implanted, and directly below the bird's beak 16,
A second region having substantially the same impurity concentration as the base region 20
A PIJ region 23 is formed. In order to form the P-type region 23 that satisfies the above conditions, the boron ions 22 are implanted with a higher acceleration energy or with a larger dose than the boron ion 190 implantation described above.

By forming this P type region 23, the P type base region becomes bi
Separate oxidation of rd's beak l 5 [115
extends in the direction.

Next, as shown in FIG. 2(d), the silicon oxide film 17 is removed, an opening 2411F is formed, arsenic or phosphorus ions are implanted, and then heat treatment is performed to form an emitter region 25. Emily, area 25 is bi r Wsbea
However, since the P-type region 23 is formed directly under it, the base width will not be narrower than the emitter and central portions, so no short circuit between the emitter and collector will occur.

Furthermore, as described above, since the P type region 23 is formed to have substantially the same impurity concentration as the P type base region 20, the increase in base-collector capacitance is small and the high frequency characteristics of the filter are not degraded.

Finally, as shown in Figures 2(e) and (f), Emi.

An electrode 26'ft is formed on the base region 25.
Electrodes 27 and 281 are also formed on the collector region 8 to obtain a walled emitter type semiconductor device of the present invention. Here, FIG. 2(f) is a sectional view in a direction perpendicular to FIG. 2 (el).

As described above in detail, according to the present invention, after forming the base region, a new space region is formed by contacting the isolation oxide film with the above-mentioned space region, thereby creating a bird'
Since the base depth directly below the s peak can be made approximately equal to the base depth at the center of the base region, it is possible to obtain a walled emitter type semiconductor device in which no emitter-collector short circuit occurs during subsequent emitter and oxide formation. .

[Brief explanation of the drawing]

FIGS. 1(a) to 1(d) are a plan view showing a conventional method for manufacturing a semiconductor device and a cross-sectional view showing the manufacturing process. FIGS. 2(a) to (fl are cross-sectional views shown in the order of manufacturing steps t-m of the embodiment of the present invention. In the figures, 1.15... isolation oxide film, 4.12.25・・・
... Emitter region, 6 ... P-type single crystal substrate, 7 ... High concentration N-type region, 8 ... N-type epitaxial layer, 9°20. ...P-type base region% 10,13.17...Silicon oxide film, 23
...P-type region, 26, 27.28 to self 1 υ
YO and a) @I Figure rMe9 躬1Figure (C) Figure 1 (d) @Z diagram (ρ) Pudeshi 2rZJtGino$ 7 Figure and C's Figure 2 (d) Figure 2 (C ) 87! Figure (Naku

Claims (1)

[Claims] In a structure having a semiconductor substrate of one conductivity type and a semiconductor layer of an opposite conductivity type formed on the semiconductor substrate, the semiconductor layer of the opposite conductivity type is surrounded in an annular shape and extends to the semiconductor substrate of the − conductivity type. a step of separating the opposite conductivity type semiconductor layer into islands by forming an insulating layer that is separated into islands;
a step of forming a first conductivity type region, a wrinkled insulator layer and a wrinkled first region;
A method for manufacturing a semiconductor device, comprising the step of implanting ions near a boundary with a region of one conductivity type to form a second region of one conductivity type in contact with the insulating layer and the first region. .