JPS5812189A - Magnetic bubble memory tester - Google Patents

Abstract

PURPOSE:To reduce the test time by about half comparing with a test time of the conventional bubble memory, by carrying out simultaneously both the reading and writing cycle tests. CONSTITUTION:In the reading cycle, a test address is prescribed by a read address counter 2 for reading cycle, and then a function pulse is generated from a function timing generator 13 to drive the bubble. The bubble output is fed to a data comparator 19 through a sense circuit 18 for checking the presence or absence of an error. On the other hand, a write test address for write is prescribed by a write address counter 21 for write cycle. Then the function timing pulse is generated from the generator 13, and a driving circuit is driven. Thus a data is written into a magnetic bubble memory 10a.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a magnetic bubble memory tester having independent read measurement lines and write measurement lines, and more particularly to a magnetic puzzle memory tester suitable for speeding up testing.

Conventional magnetic puzzle memory testers take a long time because they execute the write cycle and the readout cycle separately, and then execute the readout cycle after the write cycle is completed.

The generally widely used major/minor loop type magnetic bubble memory uses the same major loop during the write cycle and read cycle, so they cannot be performed at the same time.3゜1111 Figure is a block diagram of the major/minor loop type magnetic puzzle memory. be. In the figure, 1 is a minor loop,
2 is a measure loop, 3 is a transformer 7 agate, 4 is a detector, and 5 is a generator.

FIG. 1112 is a block diagram of a conventional magnetic bubble memory tester for testing such magnetic bubble memories. In the figure, 10 is a magnetic bubble memory, 11 is an address counter that specifies the address within the minor loop, 12 is a loop counter that indicates the Oina loop book name, and 13
14 is a data button generator consisting of a data button memory that stores data patterns; 15 is an R/W controller that controls readout cycles and write cycles; 16 is a funxion pulse drive circuit;
1T is a rotating magnetic field drive circuit, 18 is a sense circuit, 19 is a data comparator, and 20 is an error processing i1 circuit.

Next, an overview of the operation of such a circuit will be explained with respect to a read cycle.

When the address (test) in the minor route is specified by the address counter 11, the read cycle is specified by the R/W control circuit 1S. is output from the timing generator 13 and each drive circuit 1@, 1
Drive 7.

The output from the magnetic puzzle memory 10 is sent to the write data and bit serially via the sense circuit 18 to the data comparator 1.
9, and the presence or absence of an error is checked. A loop counter specifies which loop the write data and solicited data come from. A write cycle is performed in a similar manner. In this way, in conventional testers, the write cycle and read cycle are separated into depths in order to commonly use the measure loop. Because magnetic puzzle memory handles bit-serial data, it took a long time to test it.

It is an object of the present invention to shorten and speed up the conventional inefficient and long test time.

Embodiments of the present invention will be explained below with reference to FIGS. 1113 and 1114.

As mentioned above, the major/minor loop type magnetic bubble memory uses the same major loop during the write and read cycles, so it is only possible to perform depths separately for writing and reading. On the other hand, magnetic bubble memory using the replicate swap gate method has independent read measure lines and write measure lines, so it is possible to deepen the write cycle and the exposure cycle at the same time. This makes it possible to shorten test time.

Therefore, the present invention is a tester using this replicate swap gauge type magnetic bubble memory.

1 is a configuration diagram of a swap gate type magnetic bubble memory. In the figure, 1 is a minor loop, 4 is a detector, S is a generator, 6 is a light measuring line, 7 is a read measuring line, 8 is a replica F gauge,
9 is a swap gauge. Since this type of magnetic bubble memory uses separate major lines for reading and writing, it is possible to execute read and write cycles at exactly the same time.

FIG. 4 is a block diagram of an embodiment of the magnetic bubble memory tester of the present invention. In the figure, the same as the cylinder 2 figure or I
The parts corresponding to I are given the same reference numerals.

10a4:i The replicate swap gate type magnetic bubble memory shown in FIG. 3, 21 is a write address counter, 22 is a write loop counter, 23 is a read address counter, and 24 is a read loop counter.

In order to deepen the read cycle and write cycle at the same time, it has a read cycle control circuit and a write control circuit that control each cycle, and in the read cycle and write cycle, the address of the minor loop is generally 14 ik, separate address counters 23 and 21 are required for requesting and writing, and two loop counters 24 and 22 are also required. On the other hand, data patterns are shared by read cycles and write cycles, and can be accessed and shared in a time-division manner using high-speed memory. In this way, when testing a magnetic puzzle memory having independent read measure lines and write measure lines, such as the replicate soft gate method, it becomes possible to execute read cycles and write cycles at exactly the same time. That is, in the solicitation cycle, the read address counter 23 for the solicitation cycle
The test address is lll1j! When this occurs, a funk pulse is generated from the seven-point tie identification generator 13 to drive the bubble. Sense circuit 1 determines how bubbles appear
s to the data comparison 1118 and checked for errors. On the other hand, when a write test address is specified by the write address counter 21 for the write cycle independently, a funx timing pulse is generated from the funx timing generator 13, and the drive circuit is driven to drive the magnetic bubble memory. Data is written to lea.

As described above, according to the present invention, since the read cycle and write cycle tests can be performed simultaneously, the test time can be reduced to approximately half that of testing a 1 m bubble memory.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a magnetic bubble memory using the major/minor loop method, Fig. 1112 is a block diagram of a conventional magnetic bubble memory tester, Fig. 13 is a block diagram of a magnetic bubble memory using a replicate/swap gate method, and Fig. 4 1 is a block diagram of an embodiment of a magnetic bubble memory tester according to the present invention. 1.Minor loop, 4.ell, detector, 5.
e. Generator, 6...Light mesh line, T...
・Read measure line, 8... Replicate gate, 9... Swap gate, 21... Write address counter, 22... Write loop counter, 2
3. Φ... Read address counter, 24... e. Read loop counter.

Claims (1)

[Claims] In a tester that tests a magnetic puzzle memory that has 1IWk minor loops and independent read and write major lines, a circuit for controlling the write cycle and a circuit for controlling the continuous cycle are installed to control the write cycle and the continuous cycle. A magnetic puzzle memory tester that runs simultaneously.