JPS58119607A - Method of forming resistor - Google Patents
Method of forming resistorInfo
- Publication number
- JPS58119607A JPS58119607A JP95382A JP95382A JPS58119607A JP S58119607 A JPS58119607 A JP S58119607A JP 95382 A JP95382 A JP 95382A JP 95382 A JP95382 A JP 95382A JP S58119607 A JPS58119607 A JP S58119607A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- forming
- circuit board
- printed circuit
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
発明の対象
本発明は無電解めっき法により、任意の値をもつ抵抗体
を形成する方法に関する。DETAILED DESCRIPTION OF THE INVENTION Object of the Invention The present invention relates to a method for forming a resistor having an arbitrary value by electroless plating.
従来技術
従来、印刷回路基板上に抵抗を形成する方法として、第
１歯断面図の如く絶縁基板１と導体層２０間に抵抗体３
がはさまれた印刷回路板が用いられている。第２図によ
って、以下第１図の印刷回路基板ン用いた抵抗形成過程
Ｙ説明する。第２図は印刷回路基鈑の平面図である。最
初に導体層２上にフォトマスク４を形成して。Prior Art Conventionally, as a method of forming a resistor on a printed circuit board, a resistor 3 is placed between an insulating substrate 1 and a conductor layer 20 as shown in the cross-sectional view of the first tooth.
A sandwiched printed circuit board is used. Referring to FIG. 2, the process of forming a resistor using the printed circuit board of FIG. 1 will be explained below. FIG. 2 is a plan view of the printed circuit board. First, a photomask 4 is formed on the conductor layer 2.
フォトレジスト５Ｙ焼付現象し、フォトマスク４はと９
去る。この状態を第２図ｋに示す。次にエツチングにエ
リ導体２を除去し、Ｃの如く抵抗体３を露出させる。こ
れを更にエツチングして絶縁体層を露出される（（ｆｌ
。次の工程で、フォトレジスト５を剥離する（’ｔｏ次
に残された導体層２０両端を残してフォトマスク４を作
成しＶｌ、フォトレジスト５を焼付現象するＬＩＩｏｍ
ｓ。Photoresist 5Y has a baking phenomenon, and photomask 4 and 9
leave. This state is shown in FIG. 2k. Next, the edge conductor 2 is removed by etching to expose the resistor 3 as shown in C. This is further etched to expose the insulator layer ((fl
. In the next step, the photoresist 5 is peeled off ('to then, a photomask 4 is created leaving both ends of the conductor layer 20 left behind, and the photoresist 5 is baked into the LIIom.
s.
のエツチングで導体２を除去し、抵抗体を露出。Remove conductor 2 by etching and expose the resistor.
させ（ｈｌ、フォトレジスト５を剥離−する（ｊｌ。(hl), peel off the photoresist 5 (jl).
上記の方法によって導体２を１子とする第５図の断面図
に示す様な、抵抗が得られる。By the above method, a resistance as shown in the cross-sectional view of FIG. 5, in which the conductor 2 is one element, can be obtained.
さて、上記した従来の抵抗において抵抗値の精度は、５
回にわたるエツチングのエツチング精度に左右される。Now, in the conventional resistor mentioned above, the accuracy of the resistance value is 5
It depends on the etching accuracy of the etching process.
そのため一般に抵抗値の精度が悪いという傾向があった
。又、上記した様に工程が多工程の為、多大な工数を要
するものであった。Therefore, there was a tendency for resistance value accuracy to be generally poor. Furthermore, as described above, the process is multi-step, requiring a large number of man-hours.
発明の目的
本発明の目的は印刷回路基板上に所望の抵抗値の抵抗体
を精度よく形成するとともに、抵抗体を得る為の工程を
減らし、工数の低減をはかった抵抗体の形成方法を提供
することにある。OBJECTS OF THE INVENTION An object of the present invention is to provide a method for forming a resistor that can accurately form a resistor with a desired resistance value on a printed circuit board, reduce the number of steps to obtain the resistor, and reduce the number of man-hours. It's about doing.
発明の実施例とその効果
以下１本発面の一実施例を第５図により、印刷回路基板
を用い無電解メッキ法により、抵抗形成過程を説明する
。第４図断面図の如く絶縁基板１１と導体層１２からな
る印刷回路基板が用いられる、第５図は印刷回路基板の
平面図であるｂ最初にフォトマスク１４を形成して、フ
ォトレジスト１５を焼付現象し、フォトマスク１４は取
り去る１ｂ１゜次にＣの如く導体１２をエツチングし絶
縁体層を露出させ、フォトレジスト１５を剥離し導体パ
ターンを形成する（ｄｌ。更にｅに示すフォトマスク１
４を形成し、感光性触媒接着剤１６に焼付し、活性化す
る（ｊｌ。次に例えばニッケル、クロム等の抵抗材を無
電解化学めっき法により形成し抵抗層１５を得る。EMBODIMENTS OF THE INVENTION AND EFFECTS OF THE INVENTION The process of forming a resistor using a printed circuit board using an electroless plating method will be described below with reference to FIG. A printed circuit board consisting of an insulating substrate 11 and a conductor layer 12 is used as shown in the cross-sectional view of FIG. 4. FIG. 5 is a plan view of the printed circuit board. After the baking phenomenon occurs, the photomask 14 is removed 1b1°. Next, the conductor 12 is etched as shown in C to expose the insulating layer, and the photoresist 15 is peeled off to form a conductor pattern (dl. Furthermore, the photomask 1 shown in e is etched.
Then, a resistive material such as nickel or chromium is formed by electroless chemical plating to obtain the resistive layer 15.
土泥の方法によって導体１２を１子とする第６図の断面
図に示す様な、抵抗が得られる。By using the clay method, a resistance as shown in the cross-sectional view of FIG. 6, in which the conductor 12 is one element, can be obtained.
本実凡例によれは、抵抗体の抵抗値を精度よく形成する
とともに、工程を減らし、工数の低減を計る効果がある
。This example has the effect of forming the resistance value of the resistor with high accuracy, reducing the number of steps, and reducing the number of man-hours.
発明の効果
本発明によれば、抵抗体の抵抗値を精度よ（形成すると
ともに、工程を減らし、工数の低減を計る効果がある。Effects of the Invention According to the present invention, there is an effect that the resistance value of a resistor can be formed with high precision, and the number of steps can be reduced to reduce the number of man-hours.
第１因は従来用いられた抵抗層を有する印刷回路基板の
断面図、第２図は従来の抵抗の製造工程を示す図、第６
図は従来の抵抗の断面図。
第４図は本発明の印刷回路基板の材料の断面図第５図は
本発明の抵抗の製造工程を示す図、第６図は本発明によ
る抵抗の断面図である。
１１・・・絶縁材料
１２・・・導体層
１３・・・抵抗層
１４・・・フォトマスク
１５・・・フォトレジスト
１６・・・感光性触媒接着剤
代理人弁理士 薄 １）利 、！
第１ｎ
オ ２囚
オ ３ ａ
第４Ｉ
／？５［！１
オｂのThe first factor is a cross-sectional view of a conventionally used printed circuit board with a resistor layer, FIG. 2 is a diagram showing the conventional resistor manufacturing process, and FIG.
The figure is a cross-sectional view of a conventional resistor. FIG. 4 is a cross-sectional view of the material of the printed circuit board of the present invention. FIG. 5 is a diagram showing the manufacturing process of the resistor of the present invention. FIG. 6 is a cross-sectional view of the resistor according to the present invention. 11...Insulating material 12...Conductor layer 13...Resistance layer 14...Photomask 15...Photoresist 16...Photosensitive catalyst adhesive Patent attorney Usui 1) Li,! 1st n o 2 prisoner o 3 a 4th I /? 5[! 1 ob's
Claims (1)
、該導体パターンと導体パターンの間に無電解メッキ法
により抵抗体層ン形成する工程からなる抵抗体の形成方
法。A method for forming a resistor comprising the steps of forming a conductor pattern to serve as a terminal on an insulating substrate, and forming a resistor layer between the conductor patterns by electroless plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP95382A JPS58119607A (en) | 1982-01-08 | 1982-01-08 | Method of forming resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP95382A JPS58119607A (en) | 1982-01-08 | 1982-01-08 | Method of forming resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58119607A true JPS58119607A (en) | 1983-07-16 |
Family
ID=11488032
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP95382A Pending JPS58119607A (en) | 1982-01-08 | 1982-01-08 | Method of forming resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58119607A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007262563A (en) * | 2006-03-30 | 2007-10-11 | Furukawa Electric Co Ltd:The | Film metal laminate, its manufacturing method, circuit board using the film metal laminate, and manufacturing method of the circuit board |
-
1982
- 1982-01-08 JP JP95382A patent/JPS58119607A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007262563A (en) * | 2006-03-30 | 2007-10-11 | Furukawa Electric Co Ltd:The | Film metal laminate, its manufacturing method, circuit board using the film metal laminate, and manufacturing method of the circuit board |
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