JPS58118097A - Memory device - Google Patents

Memory device

Info

Publication number
JPS58118097A
JPS58118097A JP56213070A JP21307081A JPS58118097A JP S58118097 A JPS58118097 A JP S58118097A JP 56213070 A JP56213070 A JP 56213070A JP 21307081 A JP21307081 A JP 21307081A JP S58118097 A JPS58118097 A JP S58118097A
Authority
JP
Japan
Prior art keywords
bit
data
ecc block
block circuit
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56213070A
Other languages
Japanese (ja)
Inventor
Isao Yamazaki
Kyohei Hashizume
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56213070A priority Critical patent/JPS58118097A/en
Publication of JPS58118097A publication Critical patent/JPS58118097A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices

Abstract

PURPOSE:To reduce the number of memory elements relatively and improve the utilizating efficiency of the memory element, by forming and writing check bits in data width unit by an error correction detecting means, when writing access data in a storing means. CONSTITUTION:When 8-bit data are written, a write signal is first transmitted to an ECC block circuit 2' from the outside, and then, data stored in addresses assigned by addresses A0-An-1 out of the whole addresses A0-An are read out based on the write signal, and inputted into the ECC block circuit 2'. At the ECC block circuit 2', the 8-bit write data are rewritten against the 8 bits at one side assigned by, for example, ''0'' of the lowest bit An of the whole addresses A0-An out of the inputted 16-bit data. Then, a check bit of 6 bits to the 16-bit data is determined at the ECC block circuit 2', and the check bit is written in an assigned address of a memory 1'.
JP56213070A 1981-12-29 1981-12-29 Memory device Pending JPS58118097A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56213070A JPS58118097A (en) 1981-12-29 1981-12-29 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56213070A JPS58118097A (en) 1981-12-29 1981-12-29 Memory device

Publications (1)

Publication Number Publication Date
JPS58118097A true JPS58118097A (en) 1983-07-13

Family

ID=16633034

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56213070A Pending JPS58118097A (en) 1981-12-29 1981-12-29 Memory device

Country Status (1)

Country Link
JP (1) JPS58118097A (en)

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