JPS58114542A - 符号変換回路 - Google Patents

符号変換回路

Info

Publication number
JPS58114542A
JPS58114542A JP56209993A JP20999381A JPS58114542A JP S58114542 A JPS58114542 A JP S58114542A JP 56209993 A JP56209993 A JP 56209993A JP 20999381 A JP20999381 A JP 20999381A JP S58114542 A JPS58114542 A JP S58114542A
Authority
JP
Japan
Prior art keywords
pulse
bit
output
code
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56209993A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6338900B2 (OSRAM
Inventor
Noriaki Kikkai
範章 吉開
Masami Kato
加藤　正美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56209993A priority Critical patent/JPS58114542A/ja
Priority to CA000401079A priority patent/CA1186763A/en
Priority to GB8211095A priority patent/GB2098432B/en
Priority to DE3214150A priority patent/DE3214150C2/de
Priority to US06/369,838 priority patent/US4502143A/en
Priority to NLAANVRAGE8201608,A priority patent/NL185969C/xx
Priority to FR8206678A priority patent/FR2504327A1/fr
Priority to IT8267523A priority patent/IT1212659B/it
Publication of JPS58114542A publication Critical patent/JPS58114542A/ja
Publication of JPS6338900B2 publication Critical patent/JPS6338900B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP56209993A 1981-04-20 1981-12-28 符号変換回路 Granted JPS58114542A (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP56209993A JPS58114542A (ja) 1981-12-28 1981-12-28 符号変換回路
CA000401079A CA1186763A (en) 1981-04-20 1982-04-15 Consecutive identical digit suppression system in a digital communication system
GB8211095A GB2098432B (en) 1981-04-20 1982-04-16 Consecutive identical digit suppression system
DE3214150A DE3214150C2 (de) 1981-04-20 1982-04-17 Schaltungsanordnung zum Begrenzen der Anzahl gleicher aufeinanderfolgender Bits in einer Folge von Bits bei einer digitalen Übertragungseinrichtung
US06/369,838 US4502143A (en) 1981-04-20 1982-04-19 Consecutive identical digit suppression system in a digital communication system
NLAANVRAGE8201608,A NL185969C (nl) 1981-04-20 1982-04-19 Bit-invoegsysteem voor het vermijden van een teveel aan opeenvolgende identieke bits.
FR8206678A FR2504327A1 (fr) 1981-04-20 1982-04-19 Systeme de suppression de chiffres identiques consecutifs d'un systeme de transmission numerique
IT8267523A IT1212659B (it) 1981-04-20 1982-04-20 Sistema per la soppressione di digit identici consecutivi in un sistema di comunicazione digitale

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56209993A JPS58114542A (ja) 1981-12-28 1981-12-28 符号変換回路

Publications (2)

Publication Number Publication Date
JPS58114542A true JPS58114542A (ja) 1983-07-07
JPS6338900B2 JPS6338900B2 (OSRAM) 1988-08-02

Family

ID=16582076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56209993A Granted JPS58114542A (ja) 1981-04-20 1981-12-28 符号変換回路

Country Status (1)

Country Link
JP (1) JPS58114542A (OSRAM)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003515971A (ja) * 1999-11-22 2003-05-07 テレフオンアクチーボラゲット エル エム エリクソン（パブル） 一定のスループットレート適合の方法と装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003515971A (ja) * 1999-11-22 2003-05-07 テレフオンアクチーボラゲット エル エム エリクソン（パブル） 一定のスループットレート適合の方法と装置

Also Published As

Publication number Publication date
JPS6338900B2 (OSRAM) 1988-08-02

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