JPS58112674A - Resistance welding control method - Google Patents

Resistance welding control method

Info

Publication number
JPS58112674A
JPS58112674A JP21864382A JP21864382A JPS58112674A JP S58112674 A JPS58112674 A JP S58112674A JP 21864382 A JP21864382 A JP 21864382A JP 21864382 A JP21864382 A JP 21864382A JP S58112674 A JPS58112674 A JP S58112674A
Authority
JP
Japan
Prior art keywords
voltage
welding
circuit
welding current
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21864382A
Other languages
Japanese (ja)
Other versions
JPH0140717B2 (en
Inventor
Seiichiro Tamai
誠一郎 玉井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21864382A priority Critical patent/JPS58112674A/en
Publication of JPS58112674A publication Critical patent/JPS58112674A/en
Publication of JPH0140717B2 publication Critical patent/JPH0140717B2/ja
Granted legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K11/00Resistance welding; Severing by resistance heating
    • B23K11/24Electric supply or control circuits therefor
    • B23K11/25Monitoring devices
    • B23K11/252Monitoring devices using digital means
    • B23K11/258Monitoring devices using digital means the measured parameter being a voltage

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Arc Welding Control (AREA)

Abstract

PURPOSE:To improve and uniform the quality of spot welding by increasing a welding current gradually after a specific time limit from the starting of feeding and detecting nugget formation on the basis of the decrement of the integral value of an interchip voltage for every half cycle. CONSTITUTION:The voltage between chips 1 and 1 which clamp a work 2 is passed through a filter circuit 3 and integrated by an AC integrating circuit 4, whose output is supplied to a rectifying circuit 5. Once a welding current of each half cycle flows, an A/D converting circuit 6 generates a conversion starting pulse to perform conversion. By a conversion ending signal, the circuit 4 is reset and a microcomputer 8 accumulates and stores the interchip voltage of every half cycle. Then the fetched decrement of the interchip voltage of every half cycle is compared with the value of a dust generation detection value setting circuit 7 and when the former is greater than the latter, feeding is cut by an input voltage variation compensating timer 9 by a signal from the computer 8. The welding current setting of the timer 9 is carried out by a welding current setting circuit 10.

Description

【発明の詳細な説明】 本発明は、抵抗溶接制御方法に係シ、抵抗溶接特にスポ
ット溶接の品質の向上と均一化を図ることを目的とする
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a resistance welding control method, and an object thereof is to improve and make uniform the quality of resistance welding, particularly spot welding.

従来からスポット溶接の溶接品質の向上を図るだめの方
策として、(1)溶接条件の安定化制御、(2)溶接ナ
ゲツトの形成を何らかの物理量で検知し、このナゲツト
径が均一になるようにインプロセスで制御を行うことの
2通電の方法が考えられている。(1)の方法は、いわ
ゆる抵抗溶接の3大条件といわれる溶接電流1通電時限
、加圧力を変動が少ないように安定に制御する方法であ
り、例えば、入力電圧変動を補償する回路や、負荷力率
が異なった場合でも常に一定の電流を流すように制御す
る定電流制御回路等を組み込んだ同期式タイマーにその
具現化されたものをみることができる。しかし、これら
は、加圧力変動1分流、チップ変形もしくはワーク(被
溶接物)の形状9表面状況。
Traditional measures to improve the welding quality of spot welding include (1) stabilizing control of welding conditions, (2) detecting the formation of weld nuggets using some physical quantity, and controlling the welding so that the diameter of these nuggets is uniform. A dual energization method is being considered to control the process. Method (1) is a method to stably control the three major conditions of resistance welding, such as welding current 1 energization time and pressurizing force, so that there are few fluctuations. An example of this can be seen in the synchronous timer, which incorporates a constant current control circuit that controls the flow of a constant current even when the power factor varies. However, these are based on pressure fluctuation (1) branch flow, chip deformation, or shape (9) surface condition of the workpiece (object to be welded).

当り具合等の変動に対しては、何ら補償する機能をもっ
ておらず、溶接品、質を一定化することは困難である。
There is no function to compensate for variations in the contact level, etc., and it is difficult to make the quality of the welded product constant.

一方、(2)の方法は、より直接的に溶接品質すなわち
ナゲツト形成状況を音とか電圧によって検出し、ナゲツ
トが十分成長した時点で通電をカットすることにより品
質を一定化しようとするものである。例えば、溶接中の
溶接電極間電圧(以後、これをチップ間電圧と呼ぶ)を
監視し、第1図に示すように、毎サイクル毎のチップ間
電圧の各波高値を監視し、その最大値(v )を検知し
、Vpに対して予め設定しておいた割合だけチップ間電
圧が低下した時点、(Vc値になった時点)で通電をカ
ットすることにより、上記の加圧力変動等があった場合
でも、溶接品質を溶接中、すなわちインプロセスで均一
化せんとするものである(特開昭52−114541号
公報)。
On the other hand, method (2) more directly detects the welding quality, that is, the state of nugget formation, using sound or voltage, and attempts to stabilize the quality by cutting off the current when the nuggets have grown sufficiently. . For example, the voltage between welding electrodes (hereinafter referred to as the voltage between tips) during welding is monitored, and as shown in Figure 1, the peak value of the voltage between tips is monitored for each cycle, and the maximum value By detecting (v) and cutting off the current when the inter-chip voltage decreases by a preset ratio with respect to Vp (when it reaches the Vc value), the above-mentioned pressure fluctuations, etc. Even if there is, the welding quality is made uniform during welding, that is, in-process (Japanese Patent Laid-Open No. 114541/1983).

しかし、この方法の欠点は、通電時限のみの制御のため
、例えば何らかの原因で溶接電流がかなり低下した場合
、通電時限は長くなるが、十分なナゲツト成長は望めず
、したがって強度も低いことになる。ここで、第2図の
(I)は十分なナゲツトが得られた場合のチップ間電圧
の波高値のエンベロープ、同(It)はナゲツト形成が
不十分な場合を示す。
However, the disadvantage of this method is that only the energization time is controlled, so if the welding current drops considerably for some reason, the energization time will be longer, but sufficient nugget growth cannot be expected, and the strength will therefore be low. . Here, (I) in FIG. 2 shows the envelope of the peak value of the inter-chip voltage when sufficient nuggets are obtained, and (It) shows the envelope when nuggets are insufficiently formed.

また、この方法では、ワークとして軟鋼やステ゛シレス
のような比抵抗の大きい材料しか適用できない欠点を有
している。何故なら、アルミ等の比抵抗の小さい材料は
、上記波高値のエンベロープに最高値があるとは限らな
いからである。
Furthermore, this method has the disadvantage that only materials with high resistivity, such as mild steel or stainless steel, can be used as the workpiece. This is because materials with low resistivity such as aluminum do not necessarily have a maximum value in the envelope of the wave height values.

他方、溶接中に溶接部から発生するアコーステ監視シ、
アルスレッシュホールドレベル(Vti )以上のムX
信号が検出された時点で通電をカットする方法も試みら
れている。これは特に溶接中の中チリ発生に伴なう大き
なム罵信号を検出して、中チリが発生する時点では十分
なナゲツトが形成されているという考えにもとすき、そ
こで通電をカットするものである。
On the other hand, acouste monitoring system that occurs from the welding part during welding,
MuX above threshold level (Vti)
Attempts have also been made to cut off the current when a signal is detected. This is especially useful because it detects a large warning signal associated with the occurrence of medium dust during welding, and cuts off the current flow based on the idea that sufficient nuggets have been formed at the time when medium dust occurs. It is.

しかし、この方法も上記チップ間電圧方式と同様、単に
通電時限のみを制約するのみで、溶接電流を積極的に制
御する方式ではないため、例えば電流像下等によりナゲ
ツト形成が不十分な場合は五E信号も小さく、通電時限
のみが長くなるだけで、均一なナゲツト径を得ることは
できない。
However, like the tip-to-chip voltage method described above, this method only restricts the energization time and does not actively control the welding current. The 5E signal is also small, and only the energization time period becomes longer, making it impossible to obtain a uniform nugget diameter.

本発明は、チップ間電圧がナゲツト成長に密接な関連が
あることに着目し、溶接中のチップ間電圧を監視して、
電源半サイクル分の通電に対応するチップ間電圧を半サ
イクル分の通電範囲にわたって積分した積分値の減少値
が予め設定していた値を超えた時点で通電をカットする
通電制御方法であり、かつ最も重要な点は、通電開始か
ら一定期間は、そのワークの標準溶接電流で通電を行い
、その後溶接電流を各サイクル毎に略一定の割合で、順
次増加させていく方法を採用したことにある。
The present invention focuses on the fact that the inter-tip voltage is closely related to nugget growth, and monitors the inter-tip voltage during welding.
An energization control method that cuts energization when a decrease value of an integral value obtained by integrating the inter-chip voltage corresponding to energization for half a cycle of a power supply over a energization range for half a cycle exceeds a preset value, and The most important point is that the welding current is applied at the standard welding current for the workpiece for a certain period of time after the start of energization, and then the welding current is gradually increased at an approximately constant rate for each cycle. .

まず、チップ間電圧の監視方法に関して説明する。チッ
プ間電圧を検出する場合、第3図(a)に示すように単
に波高値を検出する場合と、同(b)に示すように半サ
イクル分の通電に対応するチップ間電圧をその半サイク
ル分について積分した値として検出する場合とがある。
First, a method for monitoring chip-to-chip voltage will be explained. When detecting the chip-to-chip voltage, there are cases where the peak value is simply detected as shown in Figure 3 (a), and cases where the chip-to-chip voltage corresponding to half a cycle of current is detected as shown in Figure 3 (b). In some cases, it is detected as a value integrated over minutes.

(b)の方法は、チップ間電圧の検出プループをスポッ
ト溶接機の懐にそわせて配置した場合に特に顕著にみら
れる溶接電流による誘起電圧の重畳分を大巾に除くこと
ができるので検出精度の向上が図れる利点がある。
Method (b) detects the inter-chip voltage because it can largely eliminate the superimposed induced voltage caused by the welding current, which is particularly noticeable when the probe is placed along the edge of the spot welder. This has the advantage of improving accuracy.

通電がカットされる場合は、チリが発生した場合である
。この場合は、チ・ンプ間電圧の半サイクル毎の積分値
の整流値の時間的変化は、第4図に示すように急激な低
下を示す。
The power supply is cut off when dust occurs. In this case, the time change in the rectified value of the integral value of the chip-to-chip voltage for each half cycle shows a rapid drop as shown in FIG.

したがって、チップ間電圧の半サイクル毎の積分値の整
流値の減少値(第4図のΔV)を監視し、この値が予め
定めた値以上に大きい場合もしくはチップ間電圧の通電
開始時点からの積分値の増加程度が予め設定しておいた
値よシも小さくなった場合は、チリが発生したものとし
て通電をカットする。
Therefore, monitor the decrease value of the rectified value of the integral value (ΔV in Figure 4) of the inter-chip voltage every half cycle, and if this value is larger than a predetermined value or If the degree of increase in the integral value becomes smaller than a preset value, it is assumed that dust has occurred and the energization is cut off.

なお、ここで第3図(a)の波形の根拠について説明し
ておく。
The basis of the waveform shown in FIG. 3(a) will now be explained.

チップ間電圧(e)は、通常上チップと下チップとの間
の電圧を検出プルーブを用いて検出することによシ測定
されるが、この時、チップ間電圧(e)はチップ間を溶
接電流が流れることによる抵抗降下で検出される。
The inter-chip voltage (e) is normally measured by detecting the voltage between the upper and lower tips using a detection probe. Detected by resistance drop due to current flow.

すなわち、 e=iR十に− t (K:誘起電圧係数、1:溶接電流、R:チップ間抵抗
) これを図で示したものが第5図(a) 、 (b) 、
 (c)である。
That is, e = iR + t (K: induced voltage coefficient, 1: welding current, R: inter-chip resistance) This is illustrated in Figure 5 (a), (b),
(c).

次に溶接電流の設定に関して説明する。Next, the setting of welding current will be explained.

溶接電流の設定は、通電の開始時については標準溶接電
流条件に設定する。通電が開始されて一定期間は、ワー
クのナゲツト形成箇所の温度上昇が見られ、ついに溶融
点に達し、ナゲツトが成長し始める。この間は、溶接電
流は略一定に保つか多少アップスロープをかけるのがよ
いようである。
The welding current is set to standard welding current conditions at the start of energization. For a certain period of time after energization is started, the temperature of the nugget forming part of the work increases, and finally reaches the melting point and the nugget begins to grow. During this time, it seems best to keep the welding current approximately constant or to slightly increase the slope.

さて、この区間を過ぎると、溶接電流を2〜20%の範
囲で1サイクル毎に順次増加させてゆく。具体的には、
定電流タイマーや入力電圧変動補償タイマーの溶接電流
設定電圧値を予め各サイクル毎について個々にプリセッ
トしてプログラム化しておき、溶接が進行するにつれて
、スイッチでそのプリセット値を選択してゆくように、
例えば、第6図に示すようにプリセット値を与える複数
の可変抵抗v”+ I vR21vRs +・” ” 
・vR” ト、その可変抵抗を選択するスイッチとして
アナログスイッチムS1.ム82 +ムS5.・・・・
・・ムSnと、アナログスイッチを制御するだめの電源
周波数に同期したパルスをクロック入力としてもつシフ
トレジスタi9Rとにより容易に構成できる。そして上
記VR1は第1サイクル目の溶接電流を設定するだめの
、vR2は第2サイクル目の溶接電流を設定するだめの
、vRnは第nサイクル目の溶接電流を設定するだめの
それぞれ可変抵抗である。ムNDはシフトレジスタSR
の前段のムNDゲートであシ、その入力側には電源周波
数パルスと通電時限信号がいずれもタイマーより与えら
れる。なお、通電時限は通電カット信号によって限定さ
れるが、これがタイマーにより設定される上限通電サイ
クル値を超えても出ない場合は、上限通電サイクル値に
よりカットされる。
Now, after this period, the welding current is increased one cycle at a time in the range of 2 to 20%. in particular,
The welding current setting voltage value of the constant current timer and input voltage fluctuation compensation timer is individually preset and programmed for each cycle, and as welding progresses, the preset value is selected with a switch.
For example, as shown in FIG. 6, a plurality of variable resistors v''+I vR21vRs +・'''' giving a preset value
・vR", analog switch S1 as a switch to select the variable resistance + S5...
... can be easily constructed by using a shift register i9R having as a clock input a pulse synchronized with the power supply frequency for controlling an analog switch. VR1 is a variable resistor for setting the welding current for the first cycle, vR2 is for setting the welding current for the second cycle, and vRn is for setting the welding current for the nth cycle. be. MND is shift register SR
This is a ND gate at the front stage of the ND gate, and a power supply frequency pulse and an energization time signal are both given from a timer to its input side. Note that the energization time limit is limited by the energization cut signal, but if this does not occur even after exceeding the upper limit energization cycle value set by the timer, it is cut by the upper limit energization cycle value.

次に本発明の方法を実施するだめの一回路例について第
7図の図面とともに説明する。図において、1は溶接電
極(電極チップ)、2はワーク(被溶接物)、3はフィ
ルタ回路、4は交流積分回路、5は整流回路、6はム/
D変換回路、7はチリ発生検出値設定回路、8はマイク
ロコンピュータ、9は入力電圧変動補償タイマー、1o
は第6図の溶接電流設定回路である。
Next, an example of a circuit for carrying out the method of the present invention will be described with reference to the drawing of FIG. In the figure, 1 is a welding electrode (electrode tip), 2 is a workpiece (object to be welded), 3 is a filter circuit, 4 is an AC integrating circuit, 5 is a rectifier circuit, and 6 is a mu/
D conversion circuit, 7 is a dust generation detection value setting circuit, 8 is a microcomputer, 9 is an input voltage fluctuation compensation timer, 1o
is the welding current setting circuit shown in FIG.

そしてチップ間電圧は、フィルタ回路3を介して交流積
分回路4に入力されて積分処理され、整流回路5に入力
される。ム/D変換は各半サイクル毎の溶接電流が流れ
終った時点で変換開始パルスをつくり変換を行う。
The inter-chip voltage is then input to an AC integrating circuit 4 via a filter circuit 3, subjected to integration processing, and then input to a rectifier circuit 5. In the system/D conversion, a conversion start pulse is generated at the time when the welding current for each half cycle has finished flowing, and the conversion is performed.

次にム/D変換終了信号で、この積分回路4をリセット
する。
Next, this integration circuit 4 is reset by the M/D conversion end signal.

このようにして各半サイクル毎のチップ間電圧をマイク
ロコンピュータ8のメモリ内に記憶し累積する。回路7
はディジタルスイッチで構成され、マイクロコンピュー
タ8内にとり込まれた各半すここでもし、マイクロコン
ピュータ8内で演算されたチップ間電圧の減少値の方が
回路7の設定値より大きい場谷には、マイクロコンピュ
ータ8からタイマー9に対し、通電をカットするだめの
信号を出力する。タイマー9はこの信号を受ければ直ち
に通電を力・フトする。またタイマー9の溶接電流設定
に関しては、溶接電流設定回路1oを利用して行われる
In this way, the inter-chip voltage for each half cycle is stored and accumulated in the memory of the microcomputer 8. circuit 7
is composed of digital switches, and if the reduction value of the inter-chip voltage calculated in the microcomputer 8 is larger than the set value of the circuit 7, then , the microcomputer 8 outputs a signal to the timer 9 to cut off the current. When the timer 9 receives this signal, it immediately turns on and off the current. Further, the welding current setting of the timer 9 is performed using the welding current setting circuit 1o.

さて、具体的に実施した一例を示すと、次のようである
Now, an example of a concrete implementation is as follows.

ワーク;軟鋼板(厚さ1mm ) 溶接機; 3sKVム 単相スポット溶接機制御装置;
第7図に示す装置 溶接条件;初期溶接電流    81oOム上限通電サ
イクル値 15サイクル 電流増加開始サイクル   5サイクル電流増加値  
   300ム/1サイクル通電カットのチップ間電圧
累積値 4.5v チリ検出チップ間電圧値0,25 V 以上について、加圧力を170〜2sokg、チ・フプ
(OFチップ)の径を6.8〜7 、OWinまで変化
させて溶接を行った。その結果、通電時限は7〜16サ
イクルの内に収まり、溶接結果(強度)もきわめて良好
であ−た。
Workpiece; Mild steel plate (thickness 1mm) Welding machine; 3sKV single-phase spot welding machine control device;
Equipment welding conditions shown in Fig. 7: Initial welding current 81oOm Upper limit energization cycle value 15th cycle Current increase start cycle 5th cycle current increase value
300 μm/1 cycle energization cut cumulative voltage between chips 4.5 V Dust detection voltage between chips 0.25 V or more, pressurizing force is 170 to 2 sokg, diameter of tip (OF chip) is 6.8 Welding was performed by changing the temperature to 7 to OWin. As a result, the current application time was within 7 to 16 cycles, and the welding results (strength) were also very good.

以上のように本発明の抵抗溶接制御方法によれば、通電
開始から一定時限を経た後で、溶接電流をそれまでの値
に比べ2〜20%の範囲内で順次増加させる制御と、チ
ップ間電圧の半サイクル毎の積分値の累積値の監視によ
る溶接ナゲツトの成長を保証する制御との効果的な結合
により、チップの変形や加圧力変動、電流変動、ワーク
の表面状況や当り具合等の溶接条件変動があった場合で
も常に良好で均一な溶接品質を保証することができるも
のであり、その産業性は大なるものである。
As described above, according to the resistance welding control method of the present invention, after a certain time period has elapsed from the start of energization, the welding current is gradually increased within the range of 2 to 20% compared to the previous value, and the Effective combination with control that guarantees the growth of weld nuggets by monitoring the cumulative value of the integral value for every half cycle of the voltage, it is possible to control tip deformation, pressure fluctuations, current fluctuations, workpiece surface conditions, contact conditions, etc. Even when there are variations in welding conditions, it is possible to always guarantee good and uniform welding quality, and its industrial potential is great.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はチップ間電圧の代表的な波形図、第2図はチッ
プ間電圧による通電時限制御の一例を示す図、第3図(
a) 、 (b)はチップ間電圧を半サイクル毎に積分
した一例の波形図、第4図はチリ発生があった場合のチ
ップ間電圧の一波形図、第5図(a)。 (b) 、 (c)はチップ間電圧波形を説明するだめ
の図、第6図は溶接電流を順次切シ換えてゆく溶接電流
設定回路の回路図、第7図は本発明の方法を実施するた
めの装置のブロック図である。 1・・・・・・溶接電極、2・・・・・・被溶接物、3
・・・・・・フィルタ回路、4・・・・・・交流積分回
路、5・・・・・・整流回路、6・・・・・・ム/D変
換回路、7・・・・・・チリ発生検出値設定回路、8・
・・・・・マイクロコンピュータ、9・・・・・・入力
電圧変動補償タイマー、1o・・・・・・溶接電流設定
回路。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
1!1 3図 (α) 第5図 第6図
Figure 1 is a typical waveform diagram of inter-chip voltage, Figure 2 is a diagram showing an example of energization time control using inter-chip voltage, and Figure 3 (
a) and (b) are waveform diagrams of an example of the chip-to-chip voltage integrated every half cycle, FIG. 4 is a waveform diagram of the chip-to-chip voltage when dust occurs, and FIG. 5 (a). (b) and (c) are diagrams for explaining the inter-chip voltage waveform, Figure 6 is a circuit diagram of a welding current setting circuit that sequentially switches the welding current, and Figure 7 is a diagram for implementing the method of the present invention. FIG. 2 is a block diagram of a device for 1... Welding electrode, 2... Work to be welded, 3
... Filter circuit, 4 ... AC integration circuit, 5 ... Rectifier circuit, 6 ... Mu/D conversion circuit, 7 ... Dust generation detection value setting circuit, 8.
...Microcomputer, 9...Input voltage fluctuation compensation timer, 1o...Welding current setting circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
1!1 Figure 3 (α) Figure 5 Figure 6

Claims (1)

【特許請求の範囲】[Claims] 抵抗溶接の通電開始から予め設定した時限後に溶接電流
を予め設定した割合で順次増加させ、溶接中に溶接電極
間電圧を監視して半サイクル分の通電に対する溶接電極
間電圧を前記半サイクル分の通電範囲にわたって積分し
た積分値の減少値が予め設定した値以上になった時点に
通電をカットすることを特徴とする抵抗溶接制御方法。
The welding current is increased sequentially at a preset rate after a preset time period has elapsed from the start of energization in resistance welding, and the voltage between welding electrodes is monitored during welding to adjust the voltage between the welding electrodes for half a cycle of energization to the same value as that for the half cycle. 1. A resistance welding control method, characterized in that energization is cut off when a reduction value of an integral value integrated over a energization range reaches a preset value or more.
JP21864382A 1982-12-13 1982-12-13 Resistance welding control method Granted JPS58112674A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21864382A JPS58112674A (en) 1982-12-13 1982-12-13 Resistance welding control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21864382A JPS58112674A (en) 1982-12-13 1982-12-13 Resistance welding control method

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP3120280A Division JPS5831271B2 (en) 1980-03-11 1980-03-11 Resistance welding control method

Publications (2)

Publication Number Publication Date
JPS58112674A true JPS58112674A (en) 1983-07-05
JPH0140717B2 JPH0140717B2 (en) 1989-08-30

Family

ID=16723159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21864382A Granted JPS58112674A (en) 1982-12-13 1982-12-13 Resistance welding control method

Country Status (1)

Country Link
JP (1) JPS58112674A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007169937A (en) * 2005-12-20 2007-07-05 Kyosan Electric Mfg Co Ltd Platform facility mounting structure
JP2008174183A (en) * 2007-01-22 2008-07-31 Matsushita Electric Works Ltd Footstool-integrated luminescence panel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007169937A (en) * 2005-12-20 2007-07-05 Kyosan Electric Mfg Co Ltd Platform facility mounting structure
JP2008174183A (en) * 2007-01-22 2008-07-31 Matsushita Electric Works Ltd Footstool-integrated luminescence panel

Also Published As

Publication number Publication date
JPH0140717B2 (en) 1989-08-30

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