JPS58112130A - Selecting system for position of push button - Google Patents

Abstract

PURPOSE:To discriminate quickly and assuredly the positions of plural push buttons in accordance with prescribed priority, by making the selection signal obtained on the basis of a clock pulse pass through the push buttons which are arrayed in a matrix. CONSTITUTION:A clock pulse CLK is applied to a counter C0 through a gate circuit G1 and then developed to a binary code of 4 bits through the counting of the counter C0 to be delivered as the data of 10 decoders D0-D9. The counter C0 delivers a pulse every time it counts 10 units of the pulses CLK to apply this pulse to a counter C1 of the next stage via a gate circuit G2 and resets its own circuit to start the counting of pulses again. In the same way, the counter C1 develops the count contents to a binary code of 4 bits and gives it to a decoder D10.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an operation button position selection method that enables the operator to identify the position of the operation button by giving priority to pressing it first even when multiple buttons are operated in combination on a nine-operation console such as a fire control console where a large number of operation buttons are arranged. Regarding the method.

Conventionally, this type of operation button position selection has been carried out by identifying which ml has been operated using a chain circuit made up of a group of relays, but this inevitably increases the size of the selection circuit.
It has problems such as generating a lot of noise during circuit operation and requiring a long operation time.

An object of the present invention is to provide an operation button position selection method that can simplify the circuit configuration and make it compact, and can also select one or more operation positions quickly and reliably according to a predetermined priority selection order. be.

The operation button position selection method according to the present invention includes P expansion means for dividing and accommodating operations ml arranged in a matrix of m columns and n rows into predetermined groups, and clock pulse count information is simultaneously input to these expansion means. P/ of the operation button matrix
a first selection means for selecting m columns; and a second selection means for sequentially making a 1/P selection of the expansion means for every P total of this selection means.
and a third selection means for selecting the l/n row of the operation &ff1J box, and in addition to obtaining the position information of the operation button ↓9 from the output of these selection means,
The clock pulse counting of the selection means is stopped.

According to the embodiment of the present invention, the clock pulses are counted in a counter and expanded to 10 decoders, and the output of each of the 10 decoders is further divided into 10
Select the button operation position through the group of ships arranged in 100XIO by deploying the clock pulses in 100 ways, and at the same time stop counting the clock pulses and save 1 position data. Enables writing to the memory circuit.

Embodiments of the present invention will be described below with reference to the drawings.

The figure is a configuration diagram showing an embodiment of the operation button position selection method according to the present invention.

This embodiment describes a case where 999 operation positions of 1000 operation buttons KO~ are selected using a 1001S clock pulse CLK.

The clock pulse CLK is applied to the counter CO through the gate circuit G1, and is counted by the counter CO.
The signal is expanded into a pit pinary code and given as data to 10 decoders DO to D9. Counter Co
counts 10 clock pulses CLK, outputs one pulse, and outputs one pulse to the next stage counter C via gate circuit G2.
Give one pulse to 1 to reset the circuit and start counting pulses again. Similarly, the counter C1 is developed into a pinary code with the stitch number content t4 pit and is provided to the decoder D10. Decoder DIO decodes this code and provides an output as a gate pulse to one of decoders DO to D9. Therefore, the output of decoders DO to D9 is 10
Only one out of zero can be output. If no button is operated, the 1/100 output from decoders DO to D9 is always repeated. Now, assuming that aKo is operated, the output from the decode output terminal 1 of the decoder DO makes the transistor TKO conductive, current flows through the switch of the button KO, the photocoupler PQ becomes conductive, and the input terminal 1 of the encoder E A current flows through. As a result, a signal (logic 11@) is output to the output terminal of the encoder E, which is logically inverted ("0@") through the gate 1 circuit G3 and is applied to the input gate circuit G1 of the clock signal CLK. While the clock pulse input to the controller CO is stopped, the operation button K is pressed to the memory circuit MEM.
Position information of O (H: 100th place, T: 10th place, U knee position) is sent. For example, the button position information may be stored in the memory circuit MBM at the rising edge of the output signal of the encoder E. By the way, when button KO is being operated, m1K connected to the other input terminal of encoder E
Even if it is assumed that 9 is a composite operation, this is not accepted due to the priority selection function of encoder E itself. Also, button KO
Even if you operate multiple buttons such as 90 on the buttons that make the input terminals of the encoder If they are operated at the same time, the button operation is detected with the 9th button and ζro first, and the progress of the clocks (CLKO) is stopped, so the operation button position information is transferred to the memory circuit MBM without error. By repeating the selection of 1000 operation buttons divided into 100 routes using a clock pulse of 100 AS, it can be performed at a cycle of about 10m8, so the circuit operation can be performed sufficiently even in a very short kana ml operation time. 1/N selection of the operation button position can be achieved in a short time and reliably.

As explained above, according to the present invention, by passing a selection signal based on black and blue pulses through a plurality of control modules arranged in a square arrangement, a circuit configuration that can be simplified and miniaturized is achieved. , the operation positions of multiple buttons can be identified quickly and reliably according to a predetermined priority order.

[Brief explanation of drawings]

The figure is a configuration diagram showing an embodiment of the operation button position selection method according to the present invention. Gl, G2, G3...Gate circuit, CO,
CI...Counter, DO~DIO...
Decoder, E... Encoder, PG, PG...
...Photocoupler, TRO~TR99...
Transistor %KO~ to 99... Operation button.

Claims (1)

[Claims] P expansion means for dividing and accommodating operation buttons arranged in a matrix in m columns x n rows for each predetermined group, and clock pulse count information is simultaneously input to these expansion means to select 27 m columns of the operation button matrix. a first selection means for sequentially selecting 1/P of said expansion means for each P count of said selection means;
and third selection means for selecting n rows, and in addition to obtaining the position information of the operation button from the output of these selection means, the operation is characterized in that clock pulse counting of the first selection means is stopped. Button position selection method 0