JPS5831436A - Character selecting device - Google Patents
Character selecting deviceInfo
- Publication number
- JPS5831436A JPS5831436A JP56130446A JP13044681A JPS5831436A JP S5831436 A JPS5831436 A JP S5831436A JP 56130446 A JP56130446 A JP 56130446A JP 13044681 A JP13044681 A JP 13044681A JP S5831436 A JPS5831436 A JP S5831436A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- pulse
- character
- rotary switch
- character data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/018—Input/output arrangements for oriental characters
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Input From Keyboards Or The Like (AREA)
- Document Processing Apparatus (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、仮名文字等の文字選択装置に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a character selection device for characters such as kana characters.
従来、例えば50音文字を選択して入力する装置では各
文字ごとにキーを設けているため、キーボードの面積が
大きくなり価格的にも高価なものとなりてしまう。Conventionally, in a device for selecting and inputting, for example, 50 syllabary characters, a key is provided for each character, resulting in a keyboard that takes up a large area and becomes expensive.
そこで本発明は一つの操作装置で素早く文字データを選
択できる簡単で安価な文字選択装置を提供する□もので
ある。Therefore, the present invention provides a simple and inexpensive character selection device that can quickly select character data using a single operating device.
以下本発明の一実施例を図面に基づいて説明する。第1
図において1はリエース式の回転スイッチ、2はその回
転速度の検出回路で所定速度より速いか遅いかを判別す
る。3はパルス制御回路で、検出回路2からの出力に応
じてスイッチ1からのパルスを制御するものである。4
はセットスイッチ、5はリセットスイッチ、6はリセッ
F時の制御パルスを生じるパルス発生回路である。7は
文字の桁を選択するシフトレジスタからなる選択回路、
81〜8nはラッチ回路、91〜9!Lはそれぞれ50
音文字データを記憶したROM等の記憶回路で、上位の
4ビット人1−A6でア行、力行、・・・・・・ンを選
択し、下位の3ビツトAO〜A2で段方向を選択する。An embodiment of the present invention will be described below based on the drawings. 1st
In the figure, reference numeral 1 denotes a riece type rotary switch, and 2 a rotation speed detection circuit for determining whether the rotation speed is faster or slower than a predetermined speed. Reference numeral 3 denotes a pulse control circuit that controls pulses from the switch 1 in accordance with the output from the detection circuit 2. 4
5 is a set switch, 5 is a reset switch, and 6 is a pulse generation circuit that generates a control pulse at the time of reset F. 7 is a selection circuit consisting of a shift register that selects a character digit;
81-8n are latch circuits, 91-9! L is 50 each
In a storage circuit such as a ROM that stores phonetic and character data, the upper 4 bits 1-A6 select A line, power line,...on, and the lower 3 bits AO-A2 select the row direction. do.
10は一桁の表示装置である。10 is a single digit display device.
′ 11,12は記憶回路91〜9nのアドレスを指定
するためのカウンタ、13は7リツプ70ツプ回路、1
4〜20はゲート回路、21は微分回路である。' 11 and 12 are counters for specifying addresses of the memory circuits 91 to 9n, 13 is a 7-lip 70-lip circuit, 1
4 to 20 are gate circuits, and 21 is a differential circuit.
・ つぎに動作について説明する。まずリセットスイ
ッチ5を操作し端子Rからのリセットパルスによってシ
フトレジスタ7、ラッチ回路81〜8nおよびカウンタ
11,12をリセットするとともに7リツプ70ツブ回
路13をセットし、選択回路7のD入力を@11に保持
する。上記リセットパルスによってパルス発生回路6の
端子R/ 、 R1からはこの順にパルスが発生する
ように設定しである。まず端子R′からのパルスによっ
て選択器、路7がトリガされ、その第1ビツトが@1′
になる。そして端子R′からのパルスによって7リツプ
70ツブ回路13がリセットされ、選択回路7のD入力
が@0”に反転する0選択回路7の出力・によってラッ
チ回路81が選択され、カウンタ11.12の出力がラ
ッチ回路、81を通過して記憶回路91に供給される。・Next, the operation will be explained. First, operate the reset switch 5 to reset the shift register 7, latch circuits 81 to 8n, and counters 11 and 12 with a reset pulse from the terminal R, set the 7-lip 70-tub circuit 13, and connect the D input of the selection circuit 7 to @ Hold at 11. The reset pulse is set so that pulses are generated in this order from the terminals R/ and R1 of the pulse generating circuit 6. First, a pulse from terminal R' triggers the selector, path 7, whose first bit is @1'
become. Then, the 7 rip 70 tube circuit 13 is reset by the pulse from the terminal R', and the latch circuit 81 is selected by the output of the 0 selection circuit 7, in which the D input of the selection circuit 7 is inverted to @0'', and the latch circuit 81 is selected by the output of the 0 selection circuit 7, which inverts the D input of the selection circuit 7 to The output passes through a latch circuit 81 and is supplied to a storage circuit 91.
いまカウンタ11゜12はリセットされているためその
出力によって記憶回路91からア行の第1段の文字「ア
」が選択され、表示装置10の1桁目に表示される。Since the counters 11 and 12 have now been reset, the character "A" in the first row of the A row is selected from the memory circuit 91 by the output thereof, and is displayed in the first digit of the display device 10.
そこで回転スイッチ1を所定速度以下でゆっくり回転す
ると検出回路2の出力が@1′になりゲート回路16が
開く。またパルス制御回路3からは回転スイッチ1かも
のパルスがそのまま生じ、カウンタ11に供給される。Therefore, when the rotary switch 1 is rotated slowly below a predetermined speed, the output of the detection circuit 2 becomes @1' and the gate circuit 16 is opened. Further, the pulses of the rotary switch 1 are generated as they are from the pulse control circuit 3 and are supplied to the counter 11.
そのため回転スイッチ1から1パルスが発生するごとに
文字「イ」。Therefore, every time one pulse is generated from the rotary switch 1, the letter "i" is generated.
「つ」、「工」、「オ」、「力」、「キ」−・・・・の
ごとく50音順に読み出される。They are read out in the order of the 50 syllabary characters: ``tsu'', ``tech'', ``o'', ``power'', ``ki'', and so on.
また回転スイッチ1を所定速度より速く回転すると、検
出回路2の出力によってカウンタ11がリセット状態に
保持されるとともにゲート回路17が開き、パルス制御
回路3からのパルスがカウンタ12に供給されて記憶1
11691からは50音の「ア」行、「ガj行・・・・
・・の先頭文字「力」。Further, when the rotary switch 1 is rotated faster than a predetermined speed, the counter 11 is held in a reset state by the output of the detection circuit 2, and the gate circuit 17 is opened, and the pulse from the pulse control circuit 3 is supplied to the counter 12, and the memory 1
From 11691, the 50-sound "a" line, "ga j line...
The first character of ``power''.
「す」、「夕」・・・・・・がこの順に読み出される。"Su", "Yu", etc. are read out in this order.
このときパルス制御回路3からは、回転スイッチ1から
のパルスの1/N(N:2,3・・・・・・)のパルス
が発生するものである。すなわち、回転スイッチ1から
のパルスの発生速度が速いためこれをそのままカウンタ
12に供給したのでは、読出し速度が速すぎて文字の判
読ができなくな9てしまうのでカウンタ12の歩進速度
を1/Hにして判読可能な速度で文字を読み出すように
しである。At this time, the pulse control circuit 3 generates a pulse that is 1/N (N: 2, 3, . . . ) of the pulse from the rotary switch 1. That is, since the pulse generation speed from the rotary switch 1 is fast, if the pulses were supplied as they were to the counter 12, the readout speed would be too fast and the characters would become illegible. /H to read out characters at a readable speed.
、以上のようにして文字を読み出すためどの文字でも素
早く読゛み出すことができる0例えば文字「ヌ」を読、
み出すには、回転スイッチ1を速く回転して「ア」、「
力」、「す」、「夕」、「す」の順に選択を行なった後
、回転スイッチ1をゆっくり回転して「すJ 、 r
二J 、 rヌ」の順に選択すればよい。, Since the characters are read out in the above manner, any character can be read out quickly. For example, reading the character "nu",
To remove it, rotate rotary switch 1 quickly to
After making selections in the order of ``Power'', ``Su'', ``Yu'', and ``Su'', slowly rotate rotary switch 1 to select ``SuJ, r''.
You just have to select in this order: 2J, Rnu.
こうして所望の文字を選択したらセットスイッチ4を操
作して選択回路7をトリガし、その1ビツト目の立下り
によってカウンタ11,12の出力がラッチ回路81に
ラッチされるとともに2ビツト目の出力によってラッチ
回路82が選択される。またセットスイッチ4からのパ
ルスの立下りによって微分回路21から微分パルスが生
じカウンタ11,12がリセットされる。そして上記と
全く同様に2桁目の1文字を選択しラッチ回路82にラ
ッチさせる。After selecting the desired character in this way, the set switch 4 is operated to trigger the selection circuit 7, and the outputs of the counters 11 and 12 are latched in the latch circuit 81 by the fall of the first bit, and the output of the second bit is latched by the latch circuit 81. Latch circuit 82 is selected. Furthermore, the fall of the pulse from the set switch 4 generates a differential pulse from the differentiating circuit 21, and the counters 11 and 12 are reset. Then, in exactly the same manner as above, one character in the second digit is selected and latched by the latch circuit 82.
以下同様にn桁目まで文字を選択する。Thereafter, select characters up to the nth digit in the same manner.
なお上記の実施例では回転スイッチの回転速度に応じて
50.音順にまたは各行の先頭文字を順次選、択するよ
うにしたが、回転方向に応じて選択順序を異ならせるよ
うにしてもよい、また上記のように回転スイッチを用い
るのではなく、プツシ−スイッチを用いその押圧時間の
長さに応じて選択順序を異ならせるようにしてもよい0
例えば押圧時間をカウントし、短時間で押圧が解除され
た場合には押圧の解除ごとに50音順に文字データを読
み出し、一定時間以上継続して押圧された場合には所定
周期のクロックパルスで各行の先頭文字を順次選択する
ものである。In the above embodiment, the rotation speed of the rotary switch is 50. Although the selection is made in phonetic order or sequentially from the first letter of each line, the selection order may be changed depending on the direction of rotation.Also, instead of using a rotary switch as described above, a push switch may be used. The selection order may be changed depending on the length of the pressing time using
For example, the pressing time is counted, and if the pressing is released in a short time, the character data is read out in alphabetical order each time the pressing is released, and if the pressing continues for a certain period of time, each line is read out with a clock pulse at a predetermined period. It selects the first characters in sequence.
以上のように本発明によれば、一つの操作装置で素早く
仮名の文字データを選択することができ、従来に比べて
スイッチ数を格段に滅らすことができ、安価で小型のも
のになる。As described above, according to the present invention, it is possible to quickly select kana character data with a single operating device, the number of switches can be significantly reduced compared to the conventional one, and the product is inexpensive and compact. .
第1図は本発明の一実施例を示した論理回路図、第2図
は記憶回路内の文字データの記憶パターンを示した説明
図である。
1・・・操作装置 2−・・検出回路3・・・パ
ルス制御回路 7・・・選択回路11.1イ・・・カウ
ンタ
13・・・7リツプ70クプ回路
14〜20・・・ゲート回路
以 上
出願人 株式会社 精 工 舎
代理人 弁理士 最 上 務FIG. 1 is a logic circuit diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing a storage pattern of character data in a storage circuit. 1... Operating device 2-... Detection circuit 3... Pulse control circuit 7... Selection circuit 11.1 A... Counter 13... 7 lip 70 cup circuits 14-20... Gate circuit Applicant Seikosha Co., Ltd. Agent Patent Attorney Mogami
Claims (1)
も2種類の手動操作が行なえる操作装置と、この操作装
置の一手動操作によって上記記憶回路から文字データを
50音順に読み出し他の手動操作によりて50音の各行
の先頭文字の文字データを読み出す制御回路とを具備し
た文字選択装置。A memory circuit that stores kana character data in advance, an operating device that can perform at least two types of manual operations, and one manual operation of the operating device reads the character data from the memory circuit in alphabetical order, and another manual operation reads out the character data in alphabetical order. A character selection device comprising a control circuit for reading out character data of the first character of each line of 50 syllables.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56130446A JPS6013486B2 (en) | 1981-08-19 | 1981-08-19 | character selection device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56130446A JPS6013486B2 (en) | 1981-08-19 | 1981-08-19 | character selection device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5831436A true JPS5831436A (en) | 1983-02-24 |
JPS6013486B2 JPS6013486B2 (en) | 1985-04-08 |
Family
ID=15034429
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56130446A Expired JPS6013486B2 (en) | 1981-08-19 | 1981-08-19 | character selection device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6013486B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6265123A (en) * | 1985-09-17 | 1987-03-24 | Nec Corp | Input system for kana character |
JPS6265124A (en) * | 1985-09-17 | 1987-03-24 | Nec Corp | Input system for kana character |
-
1981
- 1981-08-19 JP JP56130446A patent/JPS6013486B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6265123A (en) * | 1985-09-17 | 1987-03-24 | Nec Corp | Input system for kana character |
JPS6265124A (en) * | 1985-09-17 | 1987-03-24 | Nec Corp | Input system for kana character |
Also Published As
Publication number | Publication date |
---|---|
JPS6013486B2 (en) | 1985-04-08 |
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