JPS58105497A - 半導体集積回路 - Google Patents

半導体集積回路

Info

Publication number
JPS58105497A
JPS58105497A JP56204246A JP20424681A JPS58105497A JP S58105497 A JPS58105497 A JP S58105497A JP 56204246 A JP56204246 A JP 56204246A JP 20424681 A JP20424681 A JP 20424681A JP S58105497 A JPS58105497 A JP S58105497A
Authority
JP
Japan
Prior art keywords
circuit
output
signal
memory
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56204246A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0219560B2 (enrdf_load_stackoverflow
Inventor
Hiroshi Iwahashi
岩橋　弘
Kiyobumi Ochii
落井　清文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56204246A priority Critical patent/JPS58105497A/ja
Priority to US06/446,669 priority patent/US4546455A/en
Priority to DE8282111666T priority patent/DE3279868D1/de
Priority to EP82111666A priority patent/EP0083031B1/en
Publication of JPS58105497A publication Critical patent/JPS58105497A/ja
Publication of JPH0219560B2 publication Critical patent/JPH0219560B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
JP56204246A 1981-12-17 1981-12-17 半導体集積回路 Granted JPS58105497A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP56204246A JPS58105497A (ja) 1981-12-17 1981-12-17 半導体集積回路
US06/446,669 US4546455A (en) 1981-12-17 1982-12-03 Semiconductor device
DE8282111666T DE3279868D1 (en) 1981-12-17 1982-12-16 Semiconductor memory device having a programming circuit
EP82111666A EP0083031B1 (en) 1981-12-17 1982-12-16 Semiconductor memory device having a programming circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56204246A JPS58105497A (ja) 1981-12-17 1981-12-17 半導体集積回路

Publications (2)

Publication Number Publication Date
JPS58105497A true JPS58105497A (ja) 1983-06-23
JPH0219560B2 JPH0219560B2 (enrdf_load_stackoverflow) 1990-05-02

Family

ID=16487267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56204246A Granted JPS58105497A (ja) 1981-12-17 1981-12-17 半導体集積回路

Country Status (1)

Country Link
JP (1) JPS58105497A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03235297A (ja) * 1990-02-13 1991-10-21 Toshiba Corp 半導体集積回路
WO2003007309A1 (en) * 2001-07-11 2003-01-23 Infineon Technologies Ag Zero static power fuse cell for integrated circuits
US6781437B2 (en) 2001-07-11 2004-08-24 Infineon Technologies Aktiengesellschaft Zero static power programmable fuse cell for integrated circuits
US6850451B2 (en) 2001-07-11 2005-02-01 Infineon Technologies Aktiengesellschaft Zero static power fuse for integrated circuits
KR100481179B1 (ko) * 2002-09-10 2005-04-07 삼성전자주식회사 퓨즈를 구비한 회로 및 이를 이용한 반도체 장치

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03235297A (ja) * 1990-02-13 1991-10-21 Toshiba Corp 半導体集積回路
WO2003007309A1 (en) * 2001-07-11 2003-01-23 Infineon Technologies Ag Zero static power fuse cell for integrated circuits
US6603344B2 (en) 2001-07-11 2003-08-05 Infineon Technologies Ag Zero static power programmable fuse cell for integrated circuits
US6781437B2 (en) 2001-07-11 2004-08-24 Infineon Technologies Aktiengesellschaft Zero static power programmable fuse cell for integrated circuits
US6850451B2 (en) 2001-07-11 2005-02-01 Infineon Technologies Aktiengesellschaft Zero static power fuse for integrated circuits
KR100481179B1 (ko) * 2002-09-10 2005-04-07 삼성전자주식회사 퓨즈를 구비한 회로 및 이를 이용한 반도체 장치

Also Published As

Publication number Publication date
JPH0219560B2 (enrdf_load_stackoverflow) 1990-05-02

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