JPS58104565A - Synchronizing control system - Google Patents

Abstract

PURPOSE:To use a delay line with less amount of delay, by producing a plurality of clock pulses shifted in the phase sequentially at the delay line with one clock pulse. CONSTITUTION:A beam is detected at a photodetector 6 near a photoreceptor 5 shifting the beam modulated with an information signal, a plurality of pulses having different phase are produced with a delay line 11 from one clock, by inverting 121-12k the clock pulse and the said clock pulses. The plurality of clock pulses are latched 13 at the latch circuit with an output signal of the photodetector 6, and this output signal selects the clock pulse having a prescribed relation of phase with the output signal of the photodetector 6 in the plurality of clock pulses having sequentially shifted phase to form an information signal transfer clock pulse.

Description

[Detailed description of the invention] The present invention relates to a synchronization control method in a recording device.

Conventionally, the synchronous control method for laser printers detects the laser beam with a photodetector near the photoreceptor, creates multiple clock pulses whose phases are sequentially shifted by a delay line from one clock pulse, and converts these chronos pulses into is latched by a latch circuit using the output signal of the photodetector, and a clock pulse having a predetermined phase relationship with the output signal of the photodetector is selected from among the plurality of clock pulses using the output signal of the latch circuit to obtain information. It is used as a clock for signal transfer.

However, in this synchronous control method, a delay line generates an Australian number of clock pulses whose phases are sequentially shifted from one clock ζ pulse, so a delay line with a large amount of delay is required, which increases costs.

SUMMARY OF THE INVENTION An object of the present invention is to provide a synchronization control method that can improve the above-mentioned drawbacks and can be implemented at low cost using a delay line with a small amount of delay.

The present invention will be described below by way of examples with reference to the drawings.

FIG. 1 shows an example of a laser printer using a semiconductor laser as a light source. A laser beam emitted from a semiconductor laser 1 is collimated by an objective lens 2, deflected by an optical deflector 6 made of multifaceted steel, and imaged as a spot on a photoreceptor 5 via an f/θ lens 4. The semiconductor laser 1 is modulated by an information signal, main scanning is performed by rotating the multifaceted surface #B, and sub-scanning is performed by rotating the photoreceptor 5, so that information is recorded on the photoreceptor 5. The photodetector 6 is placed near the photoreceptor 5 corresponding to the starting point of main scanning, and detects the laser beam from the f/θ lens 4.

FIG. 2 shows an example of a circuit for implementing the present invention. In this example, in the above laser printer, the lock pulse C1 from the clock pulse generator as shown in FIG.
11, a plurality of clock pulses C2 to cff whose delay times differ by a constant time Δt are created, and these clock pulses C2 to Ck have a phase of the 11th order as shown in FIG. 6(2). The maximum amount of melee is approximately half the period of the clock pulse C1. The clock pulse c1-ck is inverted by the inverters 121 to 12 and becomes the lock pulse Ck+1 to Ck+1 as shown in FIG. 3(2).
02, and the clock pulses C1 to C02 are generated repeatedly with their phases shifted by a certain amount one after another. The photodetector 6 outputs a signal as shown in FIG. 3 111 every time a laser beam is incident, and the launch circuit 13 outputs a signal as shown in FIG. Latch and hold state. The latch circuit 13 latches and holds clock pulses 01~
The state of 02 is output as is through the non-inverting output terminals Q and .about.Q2, and at the same time, it is inverted and outputted through the inverting output terminals .about.Q2. The AND circuits 141 to 142 include selection circuits that select, based on the output signal of the latch circuit 13, the clock pulse that has a predetermined phase relationship with the output signal of the photodetector 6 from among the clock pulses C1 to C02, for example, the clock pulse that has the closest phase. and the non-inverting output terminal Q of the latch circuit 13, respectively.
1~Q2k J's output signal and inverted output terminal alternate,~(
. AND circuit 141
The output signals from 142 to 142 are transmitted through the OR circuit 15 as shown in FIG.
As shown in 3), the information signal is output as a clock pulse for information signal transfer, and the information signal is transferred from the memory to the modulation circuit by this clock pulse and modulates the semiconductor laser 1. Therefore, the laser beam is synchronized with the main scanning and transmits the information. The signals are modulated and the images on the photoreceptor 5 are aligned in the sub-scanning direction.

Note that the present invention can be similarly applied to recording devices other than the above-described laser recording device.According to the present invention, a plurality of clock pulses having different phases are generated from one clock pulse by a delay line. By inverting these clock pulses and the clock pulses, a plurality of clock pulses whose phases are sequentially shifted are generated, so that a delay line with a small amount of delay can be used, and costs can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing an example of a laser printer, FIG. 2 is a block diagram showing an example of an implementation circuit of the present invention, and FIG. 6 is a timing chart of the example of the implementation circuit. 11...Delay line, 121-12k...Inverter.

Claims (1)

[Claims] In a recording device that records information by main-scanning a light beam modulated by an information signal onto a moving photoreceptor, the light beam is detected by a photodetector near the photoreceptor, and a delay line is detected from one clock pulse. A plurality of clock pulses having different phases are generated by inverting these clock pulses and the clock pulses to generate a plurality of clock pulses having sequentially shifted phases, and the plurality of clock pulses are outputted from the photodetector. The signal is latched by a latch circuit, and the output signal of the launch circuit selects a clock pulse having a predetermined phase relationship with the output signal of the photodetector from among the plurality of clock pulses whose phases are sequentially shifted. A synchronous control method characterized by using clock pulses for signal transfer.