JPS62281664A - Optical scanner - Google Patents

Abstract

PURPOSE:To secure uniform dot spacings without using an ftheta lens by changing the pulse modulaion frequency of a laser light source. CONSTITUTION:The picture signal is inputted to a laser diode control/drive circuit 7 via a picture signal processing circuit 1. The circuit 7 uses the picture signal to modulate the clock pulse delivered from a clock pulse generating part and then uses this modulated signal to give the pulse modulation to a laser diode 3. The diode 3 produces an impulsive laser beam which is turned on and off by the modulated signal. This laser beam is deflected by a polygon mirror 4 revolving at a constant speed and performs scan on a photosensitive body 6 toward an arrow to write pictures. Here no ftheta lens is used and the circuit 7 contains a correction means which changes the pulse modulation frequency of the diode 3 so as to secure the even dot spaces.

Description

Detailed Description of the Invention (Technical Field) The present invention relates to an optical scanning device used in laser printers, facsimile machines, and the like.

(Prior Art) An optical scanning device using a polygon mirror (including one whose surface has a curvature) requires a constant velocity scanning correction lens such as an fθ lens. For example, as shown in FIG. 9, an image signal is input to the laser diode control/drive circuit 2 via the image signal processing circuit 1, and the laser diode control/drive circuit 2 receives the image signal.
The drive circuit 2 generates a pulsed laser beam by modulating a clock pulse with an image signal and modulating a laser diode 3 with the modulation signal. This laser beam is deflected by a polygon mirror 4 rotating at a constant speed, and scans the photoreceptor 6 in the direction of the arrow through an fO lens 5 to write an image. In this case, the scanning speed of the laser beam is corrected to a constant speed by the fθ lens 5, and the scanning speed of the laser beam is corrected to a constant speed by the fθ lens 5.
The intervals between the upper dots (points where pixel signals are written) are uniform.

However, since this optical scanning device uses the fθ lens 5,
It becomes expensive and puts a heavy burden on the optical system.

(Objective) It is an object of the present invention to provide an inexpensive optical scanning device capable of improving the above-mentioned drawbacks and making dot spacing uniform without using fθ.

(Structure) The present invention has means for changing the pulse modulation frequency of the laser light source so that the dot spacing is constant.

Examples of the present invention will be described below.

FIG. 1 shows an embodiment of the invention.

The image signal is input to the laser diode control/drive circuit 7 via the image signal processing circuit 1, and the laser diode control/drive circuit 7 modulates the clock pulse from the clock pulse generator using the image signal, and uses the modulated signal to control the laser diode. Pulse modulate diode 3. Therefore, the laser diode 3 generates a pulsed laser beam that is turned on and off by the modulation signal (image signal), and this laser beam is deflected by the polygon mirror 4 rotating at a constant speed and strikes the photoreceptor 6.
The image is written by scanning the top in the direction of the arrow. No f.theta. lens is used, and the laser diode control/drive circuit 7 has a correction means for changing the pulse modulation frequency of the laser diode 3 so that the dot spacing is constant. This correction means is realized by means for changing the frequency of the clock pulse in the clock pulse generation section, and the clock pulse generation means is implemented by a correction data generation circuit 8. as shown in FIG. It is composed of a D/A converter 9 and a V/F converter 10. The correction data generation circuit 8 is the sixth
When a synchronization signal as shown in Figure (a) is input, the intervals between dots on which pixel information is written by the laser beam on the photoreceptor 6 are constant in accordance with changes in the scanning speed of the laser beam. Correction data that numerically approximates the change in the pulse modulation frequency of the laser diode 3 so that the change in the pulse modulation frequency of the laser diode 3 is outputted using a clock pulse from an oscillator. This correction data 1maD
The signal is converted into an analog signal as shown in FIG. 6(b) by the /A converter 9, and FIG. 6(d) is a partially enlarged diagram. The V/F converter 10 generates a clock pulse whose frequency changes in proportion to the analog signal,
This clock pulse is used for pulse modulation of the laser diode 3 as described above. Also, is the output signal of the D/A converter 9 sensitive to light? It can also be used as a signal for correcting the amount of λ light of the body 6 by means not shown. The above synchronization signal is generated when a laser beam starts writing one line of image on the photoconductor 6.The laser beam is detected by a photodetector near the photoconductor 6, and the signal from this photodetector is the synchronization signal. used as.

The correction data generation circuit 8 includes an address generation circuit 11 and a read-only memory (RO) as shown in FIG. 4(a).
M) 12, and L and a data generating circuit 13 that does not use a ROM, as shown in FIG. 4(b). When a synchronization signal is input, the address generation circuit 11 calls out correction data from the RO 12 using a clock pulse from an oscillator. The data generation circuit 13 is constructed using a frequency dividing circuit and an 8-bit counter. FIG. 7(a) shows the scanning speed on the photoreceptor 6 and its seven-line approximate curve. The scanning speed has a slope of -3, -2, -1, O
,+1. It is approximated by 7 polygonal lines that are +2° +3, and 1
Assuming that the period is 252 clock pulses, one operation time is 252X 7 =1764 pulses. As shown in FIG. 8(a), when a synchronizing signal is input to the data generating circuit 13, first, in the first period, the clock pulse from the oscillator is divided by two using a frequency dividing circuit, and the clock pulse is down-counted to an 8-bit output counter. send as a signal. The 8-bit counter initially has all bits #IH, counts down the down-count signal, and outputs data with a slope of -3. 1/7 of one operation time (clock pulse 252
After the clock pulse has elapsed, the clock pulse is divided into three by a frequency dividing circuit and sent as a down count signal to an 8-bit counter, and data with a slope of -2 is output from the 8-bit counter. After 2/7 of one operation time has elapsed, the clock pulse enters the third period and is divided by 6 by the frequency divider circuit and sent to the 8-bit output counter as a down count signal, and the 8-bit counter receives data with slope -1. Output. After 3/7 of one operation time has passed, the fourth
When entering the interval, the count signal from the branch circuit to the 8-bit counter is stopped, and data with slope 0 is output from the 8-bit counter. After 4/7 of one operation time has elapsed, it enters the fifth period, divides the clock pulse by 6 using a frequency divider circuit, sends it as an 8-bit counterhair count signal, and calculates the slope + 1 from the 8-bit counter. Output data. After 577 of one operation time has elapsed, the device enters the 6th period, divides the clock pulse by 3 using the frequency divider circuit, sends it as an 8-bit counterhair count signal, and receives the slope + 2 data from the 8-bit counter. Output. After 6/7 of one operation time is completed, it enters the 7th section,
Divide the frequency by 2 using the Glock pulse frequency divider circuit, send the 8-bit counter λ, and output the slope + 3 data from the 8-bit counter.6 After one operation time has elapsed, the operation is stopped and the next synchronization signal is input. There will be a wait.

FIG. 7(b) shows the scanning speed on the photoreceptor 6 and its five-line approximate curve. If the scanning speed is approximated by five polygonal lines, the slopes of the polygonal lines are -2, -1, O, +
1. +2, one section is 168 clock pulses, and one operation time is 168X 5 = 840840
Pulse. In this case, the data generation circuit 13 is as shown in FIG. 8(b).
As shown in the figure, when the synchronization signal is input, first in the first section, the frequency of the Glock pulse is divided by 1 using the frequency divider circuit (as is).
The clock pulse is sent to the 8-bit counter as a down count signal, and after one operation time of 115 has elapsed, the clock pulse enters the second period and is divided by two in a frequency dividing circuit and sent as a down count signal to the 8 bit counter. 2 of one operation time
After 15 has elapsed, it enters the third section and the frequency is changed from 1 to 8.
Stops the count signal to the bit counter. After one operation time of 315 has elapsed, the clock pulse enters the fourth period, and the frequency of the clock pulse is divided by two by the frequency divider circuit and sent as an 8-bit output count signal. 41 hours per operation time
After the completion of 5, the clock pulse enters the 5th period and is divided by 1 in the frequency divider circuit and sent to the 8-bit counter. After one operation time ends, the operation is stopped and the next synchronization signal is input. There will be a wait.

Note that, as shown in FIG. 3, the output signal frequency of the V/F converter 10 may be multiplied by a plurality of times (N) by the PLL circuit 14. The PLL circuit 14 includes a phase comparator 15. as shown in FIG. Low pass filter 16° voltage controlled oscillator (VCO) 17. It is composed of an N frequency divider circuit 18, and the phase comparator 15 compares the phases of the output signal of the V/F converter 10 and the output signal of the N frequency divider circuit 18. The output signal of the phase comparator 15 passes through a low-pass filter 16 to control the oscillation frequency of the voltage controlled oscillator 17. The output signal frequency is N times the output signal frequency of the V/F converter 10.

(Effects) As described above, according to the present invention, a means for changing the pulse modulation frequency of the laser light source so that the dot spacing is constant is provided in the optical scanning device without using an fθ lens.
The load on the optical system is reduced and it can be realized at low cost.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram showing one embodiment of the present invention, FIG. 2 is a block diagram showing a clock pulse generation means of the same embodiment, and FIG.
The figure is a block diagram showing another clock pulse generating means, FIGS. 4(a) and 4(b) are block diagrams showing another example of the correction data generating circuit, FIG. 5 is a block diagram showing a PLL circuit, and FIG.
The figure shows the signal waveform of the clock pulse generating means,
FIGS. 7(a) and (b) are characteristic diagrams showing the scanning speed polygonal line approximation characteristics of the correction data generation circuit, and FIGS. 8(a) and (b)
) is a flowchart showing the operation of the correction data generating circuit example, and FIG. 9 is a schematic diagram showing a conventional optical scanning device. 3...Laser diode, 4...Polygon mirror, 6...Photoreceptor, 7...Laser diode control/drive circuit. Figure 1 No. 20 ] Fortune 1 Kop Yumi 1 [No.
Nu 11 signal figure 5! ? Figure H (a) Figure 8 (as shown)

Claims (1)

[Claims] In an optical scanning device, a laser light source is pulse-modulated by an image signal to generate a pulsed laser beam, and this laser beam is scanned onto a photoreceptor by a polygon mirror rotating at a constant speed to write an image. An optical scanning device characterized by comprising means for changing the peripheral speed of the pulse modulation so that the intervals between points at which pixel information is written by a pulsed laser beam are constant.