JPS58104042U - Synchronous detection circuit - Google Patents

Synchronous detection circuit

Info

Publication number
JPS58104042U
JPS58104042U JP19873481U JP19873481U JPS58104042U JP S58104042 U JPS58104042 U JP S58104042U JP 19873481 U JP19873481 U JP 19873481U JP 19873481 U JP19873481 U JP 19873481U JP S58104042 U JPS58104042 U JP S58104042U
Authority
JP
Japan
Prior art keywords
signal
detection circuit
synchronous detection
input signal
reproduction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19873481U
Other languages
Japanese (ja)
Inventor
植村 卓哉
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to JP19873481U priority Critical patent/JPS58104042U/en
Publication of JPS58104042U publication Critical patent/JPS58104042U/en
Pending legal-status Critical Current

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  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示すブロック図、第2図
は第1図の動作を説明するための波形図である。 図中、3はサンプリング回路、4は比較回路、5は積分
回路である。なお、図中、同一符号は同一、又は相当部
分を示す。
FIG. 1 is a block diagram showing an embodiment of this invention, and FIG. 2 is a waveform diagram for explaining the operation of FIG. 1. In the figure, 3 is a sampling circuit, 4 is a comparison circuit, and 5 is an integration circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力信号から再生用タイミング信号を発生させ、このタ
イミング信号により上記入力信号をサンプリングして復
号再生するものにおいて、上記入力信号の変化点(同期
信号)と上記再生用タイミング信号とを比較し、その位
相差に応じたレベル信号を出力とする比較器を備え、こ
の比較器出力レベルにより上記復号再生あ同期状態を検
出するようにしたことを特徴とする同期検出回路。  
In a device that generates a reproduction timing signal from an input signal, and samples and decodes and reproduces the input signal using this timing signal, a change point (synchronization signal) of the input signal is compared with the reproduction timing signal, and 1. A synchronization detection circuit comprising a comparator that outputs a level signal according to a phase difference, and detects the decoding/reproduction synchronization state based on the output level of the comparator.
JP19873481U 1981-12-29 1981-12-29 Synchronous detection circuit Pending JPS58104042U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19873481U JPS58104042U (en) 1981-12-29 1981-12-29 Synchronous detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19873481U JPS58104042U (en) 1981-12-29 1981-12-29 Synchronous detection circuit

Publications (1)

Publication Number Publication Date
JPS58104042U true JPS58104042U (en) 1983-07-15

Family

ID=30111902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19873481U Pending JPS58104042U (en) 1981-12-29 1981-12-29 Synchronous detection circuit

Country Status (1)

Country Link
JP (1) JPS58104042U (en)

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