JPS58103224A - Producing circuit of superconductive timing signal - Google Patents

Abstract

PURPOSE:To obtain the timing signal of a rectangular wave type of a sharp rise, by forming a timing signal producing circuit with a combination of the series circuits of plural Josephson junctions which have a substantially equal critical current value respectively. CONSTITUTION:The series circuits U1 and U2 consist of Josephson junctions J1-J4 and J1'-J4' which have a substantially equal critical current value respectively. An end of each of these series circuits is connected to a resistance RB functioning as an impedance element and as well to an input terminal T1 via a resistance R1 and a trigger generating junction JS. While, the other ends of both series circuits are grounded respectively. An output terminal TO is led out from a joint of the circuit U2 and the junction JS. In such a constitution of the circuit, the a rectangular wave type timing signal of a sharp rise can be obtained from the sine wave signal supplied to the terminal T1 at the terminal T0.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a superconducting timing signal forming circuit configured using a Josephson junction, which forms a rectangular wave timing signal with a steeper rise than a sinusoidal input signal.

As shown in FIG. 1, conventional superconducting timing signal forming circuits of this type have approximately the same % critical current values of 1. It has a series circuit U in which a plurality of N (4 in Il!!J) Josephson junctions J1, J2, . . . JN are connected in series, and From one end side,
An input terminal T1 is derived through a resistor RO, and is connected to the other end of the -1 series circuit U or ground, and an output terminal TO is derived from the midpoint of the connection between the series circuit W&U and the resistor RO. The following configuration has been proposed.

By the way, according to the configuration of the superconducting timing signal forming circuit shown in FIG. A sinusoidal current 11 (not shown) corresponding to the waveform of S1 flows into the series circuit U through the resistor RO. Therefore, as the input signal S1, looking at IK[11,
If we use a device that has a larger amplitude than the critical current values of the Josephson junctions J1 to JN, the critical current values l,
If it is assumed that there is no variation in current 11, the value of current 11 has a critical current value of 1. From the time points t1 and t1' when the superconducting state and -1 are reached, the state simultaneously transitions from the superconducting state to the voltage-carrying state, and therefore, a valley of the input signal S1 is formed between the shoulders of the series circuit U, that is, between the output terminal TO and the ground. In the positive and negative sections, a rectangular waveform voltage VO (not shown) is obtained that rises sharply at time points t1 and t1', respectively. As a result, a load of 8L is preliminarily applied between the output $TO and ground.
It's close! jt8, the load R1 receives a rectangular waveform signal that rises steeply at times t1 and ti/ in the six positive and negative sections of the input signal S1, as shown in FIG. 2B. , which is obtained as the timing signal S2.

In this case, the timing signal S2 has an amplitude corresponding to the number N of Josephson junctions J1 to JN that constitute the series circuit U.

Therefore, in the case of the conventional superconducting timing signal forming path (b) shown in Figure 1, it is assumed that the Josephson junctions J1 to JN forming the series circuit U have no variation in critical current value between them. For example, the timing signal S2 can be obtained as having a desired waveform.

However, the Josephson junction J1 that constitutes the series circuit U
．． J2. It is extremely difficult to prepare JN with no variation in critical current value between them, and for this reason, the Josephson junction J1 If the critical current value has a variation of 1,
All of the Josephson junctions J1 to JN are at the time t mentioned above.
1 and 41', the Josephson junctions J1 to JN sequentially transition to the voltage state from the Josephson junctions having smaller critical current values, and as a result, the timing signal S2 changes to the voltage state. , as shown in FIG. 20, is obtained as a step-like structure.

#! The conventional superconducting timing signal forming circuit shown in FIG. 1 has the disadvantage that it is not possible to obtain the timing signal S2 with a desired waveform.

Accordingly, the present invention proposes a novel superconducting timing signal forming circuit which does not have the above-mentioned drawbacks, as will become clear from the detailed description below.

FIG. 3 shows an embodiment of a superconducting timing signal forming circuit according to the first invention of the present application.
Josephson junctions J1゜J2. of N (however, four in the figure) number of digits having 8. ......JN are connected in series#! 1 series circuit U1 and a plurality of N Josephson junctions J1 having mutually equal critical current values I'.
'.

J2', . . . JN/ are connected in series.

Then, from one end side of the series circuits U1 and U2, respectively, via the first resistor R1 and the trigger signal generation layer Josephson junction (hereinafter simply referred to as Josephson junction for simplicity),
A common input terminal T1 is derived therefrom.

The other side of the series circuits U1 and U2 is also connected to ground.

Furthermore, the connection midpoint between the series circuit U1 and the resistor R1, and the series circuit j
Between lU2 and the connection midpoint with Josephson junction JS,
A resistor RB as an impedance element z is connected.

Further, an output f4TO is derived from the connection midpoint between the series circuit U2 and the Josephson junction J8.

The above is the configuration of the superconducting timing signal forming circuit according to the first aspect of the present invention. According to this configuration, the following operation can be obtained.

That is, between the input terminal T1 and the ground, there is a sinusoidal input signal 81 as shown in FIG.
When , a sinusoidal current 11 (not shown) corresponding to the waveform of the input signal 81 flows through the Josephson junction J8 to the series circuit U2. Therefore Josephson junction J
8, the Josephson junctions J1' to J of the series circuit U2
A critical current value l·ko3 which is slightly smaller than N' is used in advance, and as the input signal s1, the critical current 11i of the Josephson junction JS is used in terms of the current 11.
I. If a device with a larger amplitude is used in advance, the value of the current 11 will be
Critical current values of Josephson junction JS, I and -1j,
From the time point S tl and t1', the Josephson junction J8 transitions from the superconducting state to the voltage-containing state.

Therefore, if a resistor R1 having a value sufficiently smaller than the internal resistance when the Josephson junction JS transitions to the voltage state is used in advance, the series circuit can be connected through the Josephson non-junction J8. The current 11 that was flowing through U2 almost no longer flows from time t1 and t1' in the 6 positive and negative sections, and instead, in the 6 positive and negative sections of the input signal -81. , from time points t1 and tl'', a rising current I2 (not shown) flows through the series circuit U via the resistor R1.
1. However, in this case, the current I2 is generated at times t1 and t in the six positive and negative sections of the input signal S1.
This is obtained by adding a trigger pulse-like current IT that rises sharply from time points t1 and t1' as shown by the solid line or dotted line in FIG. 4B to the current that rises at 1'. As a result, as the resistor R1, the current I2 is the critical current value of the Josephson junctions J1 to JN of the series circuit U1,
If Josephson junctions J1 to JN have a sufficient value to obtain a larger amplitude, even if the critical current values vary somewhat between them, Josephson junctions J1 to JN All of JN simultaneously transition from the superconducting state to the voltage state at a time slightly delayed from time points t1 and t1' in the six positive and negative sections of the input signal 81.

Also, if the Josephson junctions J1 to JN of the series circuit U1 are transferred to a voltage-carrying state, the voltage will be applied between both d of the series circuit U1 at times t1 and t1 in the 6 positive and negative sections of the input signal S1.
A voltage V1 (not shown) is obtained that rises sharply from a point slightly later than t1', and accordingly, in the 6 positive and negative sections of input signal S1, the voltage V1 rises sharply from a point slightly later than t1'. After the delay, a current I3 (not shown) rises steeply and flows into the series circuit U2 via the resistor RB. As a result, if a resistor RB having a value sufficient for the current I3 to take on a larger amplitude than the critical current value of the Josephson junctions J1' to JN' of the series circuit U2 is used in advance, the Josephson Even if there is some variation in the critical current value between the junctions J1' to JN',
All of the Josephson junctions J1·' to JN' occur at times t1 and t1' during the six positive and negative intervals of the input signal S1.
At a slightly later time, the superconducting state simultaneously transitions to the voltage-bearing state. .

Furthermore, the Josephson junctions Jl'~J of the series circuit U2 are
If N' transitions to the voltage state6, and assuming that a load of 1% L is connected between the output terminal TO and ground in advance, if the load fLL is appropriately selected and placed, then the voltage between both ends of the series circuit U2 will be reduced. Therefore, 6 of the input signal S1 is connected between the output terminal TO and ground.
In the positive and negative sections, a rectangular wave voltage V2 (
(not shown) is obtained, and accordingly the load RL, as shown in FIG. Time points t1 and t1'
A rectangular waveform signal that rises sharply from a slightly later time point is obtained as the timing signal S2.

In this case, the timing signal 82 is connected to the series circuit U2')
Josephson junctions J1' to JN' (7
) The amplitude corresponds to the number N.

Therefore, according to the superconducting timing signal forming circuit according to the first invention of the present application shown in FIG. 6, Josephson junctions J1 to JN forming the series circuit U1 and Josephson junction J1' forming the series circuit U2. - To obtain a rectangular wave-like timing signal S2 having a desirable waveform with a steep rise from a sine-wave-like input signal S1 even if JN' has some variation in critical current value between them. It has the great feature of being able to do

Next, an example of a super-transfer timing signal forming circuit according to the second invention of the present application will be described with reference to FIG. 5. Parts corresponding to those in FIG. Although this is omitted, in the configuration described above in FIG. 3, the configuration is the same as in the case of the stripe diagram 3, except that the second resistor R2 is connected in parallel to the Josephson junction J8. has.

The above is an example of the configuration of the superconducting timing signal forming circuit according to the second invention of the present application, but according to the pasted configuration, it has the same configuration as the case of the third invention, except for the matters mentioned above. Although a detailed explanation will be omitted, if a sinusoidal input signal S1 as shown in FIG. 4 is applied between the input terminal T1 and the &' ground as in the case of FIG. 5, the output terminal T
#A between O and ground, it is possible to obtain a rectangular wave-like timing signal S2 with a steep rise as shown in FIG. 4C.

However, since Josephson junction J8 has resistor 2 connected in parallel to Josephson junction JS, current 1.
2, after which the series circuit U2 is transferred to the energized state.
Even when the current I3 passes through the resistor RB, a sinusoidal current I4 (not shown) corresponding to the waveform of the input signal S1 is generated.
can be passed through the series circuit U2 as a bias current through the resistor &2.

For this reason, the Josephson junction J1 of the series circuit U2 mentioned above
The transition to the voltage-applied state of '~JN' is more steep and reliably obtained than in the case of FIG.

Therefore, according to the superconducting timing signal forming circuit according to the present invention shown in FIG. 5, the timing signal S2 which rises more steeply than in the case of FIG. 5 can be input more reliably than in the case of FIG. It has the great feature that it can be obtained from the signal S1.

Next, an example of a superconducting timing signal forming circuit according to the third invention of the present application will be described with reference to FIG. 6. Parts corresponding to those in FIG. Although omitted, the configuration described above in FIG. 5 has the same configuration as the case in FIG. 3, except that the third resistor R6 is connected in series to the Josephson junction JS. .

The above is an example of the configuration of the superconducting timing signal forming circuit according to the third invention of the present application.
Since it has the same configuration as the case in Figure 3 except for the matters mentioned above, detailed explanation thereof will be omitted.
As in the case shown in the figure, a rectangular wave timing signal S2 with a steep rise can be obtained from a sinusoidal input signal S1.

However, since the Josephson junction J8 has the resistor B3 connected in series, even when the current 2 flows through the resistor R1 in the series circuit U1 due to the transition of the Josephson junction J8 to the voltage state, A sinusoidal current 15 (not shown) corresponding to the waveform of the input signal S1 can be passed back to the series circuit U1 via the resistor R1.

Therefore, the transition of the Josephson junctions J1 to JN of the series circuit U1 to the voltage-carrying state can be achieved more sharply and reliably than in the case of FIG. 3.

Therefore, according to the superconducting timing signal forming and forming circuit according to the present invention shown in FIG. 6, the timing signal S2, which rises more steeply than in the case of FIG. 5, can be generated more reliably than in the case of FIG. It has the great feature that it can be obtained from the input signal S1.

Next, an example of a superconducting timing signal forming circuit according to the fourth invention of the present application will be described with reference to FIG. 7. Parts corresponding to those in FIG. Although omitted, in the configuration described above in FIG. 6, a resistor 2 is connected in parallel to the Josephson junction JS as in the case of FIG. 5th!5th! except that R3 is connected in series! It has the same configuration as that of IT.

The above is an example of the configuration of the superconducting timing signal forming circuit according to the fourth invention of the present application.According to the preferred configuration, it has the same configuration as the case of FIG. 3, a rectangular wave timing signal S2 having a steeper rise can be obtained from the sinusoidal input signal S1, although a detailed explanation thereof will be omitted.

However, in the case of the superconducting timing signal forming circuit according to the present invention shown in FIG. 7, the Josephson junction J8 has a resistor R2 connected in parallel as in the case of FIG.
Since it has the resistor R3 connected in series as in the case shown in the figure, it has a great feature that it also has the features described above for the cases shown in w15 and Fig. 6.

In the improvement statement, for each of the first to fourth inventions of the present application,
Only one example has been mentioned in each case, for example, a resistor as impedance element 2! LB may be replaced with an inductor or a series circuit of a resistor and an inductor, and other modifications may be made without departing from the spirit of the invention.

[Brief explanation of the drawing]

Fig. 1 is a connection diagram showing a conventional superconducting timing signal forming path, Fig. 2 is a signal waveform diagram for explaining the same, and Fig. 3 is a superconducting timing signal forming circuit according to the first invention of the present application. Connection diagram showing an example of 4th &! J is a signal waveform diagram for explaining the same, and FIGS. 5, 6, and 7 are diagrams showing examples of superconducting timing signal forming circuits according to the second, third, and fourth inventions of the present application, respectively. be. In the figure, J1 to JN and J1' to JN' are Josephson junctions, Ul and U2 are series circuits, JS is a Josephson junction for trigger signal generation, and 81 and RB are Josephson junctions. R2 and R3 are resistors, 2 is an impedance element, T1 is an input end, TO is an output end, and KL is a load. Applicant Japan 1iL 0111IL Ayu Kosha Figure 2 Figure 4

Claims (1)

[Claims] 1. A plurality of N Josephson junctions J1, J2, each having substantially equal critical currents. ......A first series circuit in which JN are connected in series, and a plurality of N Josephson junctions J1 each having substantially the same critical current.
', J2',...JN' are connected in series, and one end of the first and second series circuits is connected to the other end of the sea bream, respectively. Through a first resistor and a Josephson junction for generating a trigger signal,
A common input terminal is led out for them, and the other end of the first and M2 series circuits is connected to the ground, and the midpoint of the connection between the first series circuit and the first resistor;
An impedance element is connected between the middle point of the connection between the second series circuit and the Josephson junction for generating a trigger signal, and an impedance element is connected between the second series circuit and the Josephson junction for generating the trigger signal. A superconducting timing signal forming circuit characterized in that an output terminal is derived from a point. 2. A plurality of N Josephson junctions J1.2 having substantially equal critical currents. J2. A first series circuit in which JN are connected in series, and a plurality of N Josephson junctions J1' having substantially equal critical currents,
J2',...JN' and a second series circuit connected in series, and from one end side of the first and second series circuits, the first through the resistance and Josephson junction for trigger signal generation.
A common input terminal is derived therefrom, the other ends of the first and second series circuits are connected to ground, and a midpoint between the first series circuit and the first resistor;
An impedance element is connected between the second series circuit and the Josephson junction for generating the tri-left signal, and an impedance element is connected between the second series circuit and the Josephson junction for generating the tri-left signal. A superconducting timing signal forming circuit characterized in that an output terminal is led out from the connection midpoint of the circuit, and a second resistor is connected in parallel to the Josephson junction for generating the tri-force signal. 5. A plurality of N Josephson junctions each having approximately equal critical % flow.1. J2. . . . A series circuit of wil in which JN are connected in series, and a plurality of N Josephson junctions J 1' each having approximately the same critical current.
, J2',...JN' are connected in series, and from -gsl&lI of the first and second series circuits, respectively @ A common input terminal is led out through the resistor No. 1 and a Josephson junction for generating a trigger signal, and is connected to the other end of the first and second series circuits or to ground. a connection midpoint between the series circuit and the first resistor;
An impedance element is connected between the middle point of the connection between the second series circuit and the Josephson junction for generating a trigger signal, and an impedance element is connected between the second series circuit and the Josephson junction for generating the trigger signal. A superconducting timing signal forming circuit characterized in that an output terminal is led out from a point, and a third resistor is connected in series to the Josephson junction for generating a trigger signal. 4. A plurality of N Josephson junctions J1.4 having substantially equal critical currents. J2. ......-A series circuit of Ill in which JN are connected in series, and a plurality of N Josephson junctions J1' having substantially equal critical currents,
J2',...---JN' and a second series circuit connected in series, and a first resistor is connected from one end side of the first and second series circuits, respectively. and via a Josephson junction for trigger signal generation.
A common input terminal is led out for them, the other ends of the first and second series circuits are connected to ground, and the middle point of the line between the first series circuit and the first resistor;
An impedance element is connected between the connection midpoint between the second series circuit and the Josephson junction for generating a trigger signal, and a connection between the second series circuit and the Josephson junction for generating the trigger signal. A superconducting timing signal forming circuit characterized in that an output end is led out from the midpoint, and a second resistor is connected in parallel to the Josephson junction for generating the trigger signal, and a fifth resistor is connected in series. .