JPS5795728A - Impulse noise eliminating device - Google Patents
Impulse noise eliminating deviceInfo
- Publication number
- JPS5795728A JPS5795728A JP17164080A JP17164080A JPS5795728A JP S5795728 A JPS5795728 A JP S5795728A JP 17164080 A JP17164080 A JP 17164080A JP 17164080 A JP17164080 A JP 17164080A JP S5795728 A JPS5795728 A JP S5795728A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- noise
- signal
- original signal
- detected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003111 delayed effect Effects 0.000 abstract 1
- 238000001514 detection method Methods 0.000 abstract 1
- 238000005070 sampling Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
- H03G3/34—Muting amplifier when no signal is present or when only weak signals are present, or caused by the presence of noise signals, e.g. squelch systems
- H03G3/345—Muting during a short period of time when noise pulses are detected, i.e. blanking
Landscapes
- Noise Elimination (AREA)
Abstract
PURPOSE:To supply an interpolating signal to the original signal smoothly, by multiplying the difference between signal levels just before the leading edge and just after the trailing edge of a noise by a coefficient corresponding to the time width of the noise and by applying the multiplied result to the input of an integrating circuit. CONSTITUTION:An original signal with a noise put on is inputted from a terminal 4 to a main circuit 1 and is delayed by an analogue delay circuit 7. The noise included in the original signal is detected by a detection control circuit 3, and the time width of the noise is detected by a comparator 19. Levels of the original signal just before the leading edge and just after the trailing edge of the noise are held in sample hold circuits 12-1 and 12-2 of an interpolating circuit 2, and their level difference is detected by a differential amplifier 13. This level difference is divided in a dividing circuit 30 by the time width of the noise, and the result is inputted to an integrating circuit 14, and a lamp wave is generated by the circuit 14. The lamp wave and a signal, which is obtained by sampling and holding the noise section of the original signal from the circuit 1 by a sample hold circuit 15, are added and amplified by an adding amplifier 16 to interpolate the noise section with the lamp wave. A switch 8 is controlled by the sig nal from the circuit 3 of transmit the interpolating signal from the amplifier 16 only in the noise section.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17164080A JPS5795728A (en) | 1980-12-05 | 1980-12-05 | Impulse noise eliminating device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17164080A JPS5795728A (en) | 1980-12-05 | 1980-12-05 | Impulse noise eliminating device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5795728A true JPS5795728A (en) | 1982-06-14 |
Family
ID=15926945
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17164080A Pending JPS5795728A (en) | 1980-12-05 | 1980-12-05 | Impulse noise eliminating device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5795728A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0135081A2 (en) * | 1983-07-30 | 1985-03-27 | Victor Company Of Japan, Limited | Noise reduction by linear interpolation using a dual function amplifier circuit |
US4555669A (en) * | 1983-07-21 | 1985-11-26 | Victor Company Of Japan | Noise reduction by linear interpolation using a single sample-and-hold circuit |
-
1980
- 1980-12-05 JP JP17164080A patent/JPS5795728A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4555669A (en) * | 1983-07-21 | 1985-11-26 | Victor Company Of Japan | Noise reduction by linear interpolation using a single sample-and-hold circuit |
EP0135081A2 (en) * | 1983-07-30 | 1985-03-27 | Victor Company Of Japan, Limited | Noise reduction by linear interpolation using a dual function amplifier circuit |
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