JPS579165A - Picture shrinking device - Google Patents

Picture shrinking device

Info

Publication number
JPS579165A
JPS579165A JP8330180A JP8330180A JPS579165A JP S579165 A JPS579165 A JP S579165A JP 8330180 A JP8330180 A JP 8330180A JP 8330180 A JP8330180 A JP 8330180A JP S579165 A JPS579165 A JP S579165A
Authority
JP
Japan
Prior art keywords
shrinking
ram5
processor
code conversion
result
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8330180A
Other languages
Japanese (ja)
Inventor
Mamoru Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP8330180A priority Critical patent/JPS579165A/en
Publication of JPS579165A publication Critical patent/JPS579165A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40—Picture signal circuits
    • H04N1/40068—Modification of image resolution, i.e. determining the values of picture elements at new relative positions

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Editing Of Facsimile Originals (AREA)

Abstract

PURPOSE:To give large versatility to the change in a shrinking factor, by storing the result of operation according to the method of 2-dimensional shrinking to a memory in advance and reading out the information relating to a density level as an address. CONSTITUTION:When a scheduled shrinking factor is given to a processor 7 with a shrinking factor setter 6, the processor 7 makes operation for the code conversion and sequentially writes in the result of operation in a RAM5, while corresponding original video element information Qs1-Qs4 respectively transmitted from an input latch circuit 4, line synchronizing signal SYNC, and NEXT signal fed back from the RAM5 indicating the next state to an address bus. Thereafter, the code conversion for an input video information DATA.IN is executed.
JP8330180A 1980-06-19 1980-06-19 Picture shrinking device Pending JPS579165A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8330180A JPS579165A (en) 1980-06-19 1980-06-19 Picture shrinking device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8330180A JPS579165A (en) 1980-06-19 1980-06-19 Picture shrinking device

Publications (1)

Publication Number Publication Date
JPS579165A true JPS579165A (en) 1982-01-18

Family

ID=13798579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8330180A Pending JPS579165A (en) 1980-06-19 1980-06-19 Picture shrinking device

Country Status (1)

Country Link
JP (1) JPS579165A (en)

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