JPS5773590A - Receiving system for time sharing channel control information - Google Patents

Receiving system for time sharing channel control information

Info

Publication number
JPS5773590A
JPS5773590A JP14815480A JP14815480A JPS5773590A JP S5773590 A JPS5773590 A JP S5773590A JP 14815480 A JP14815480 A JP 14815480A JP 14815480 A JP14815480 A JP 14815480A JP S5773590 A JPS5773590 A JP S5773590A
Authority
JP
Japan
Prior art keywords
highways
control information
call
receiving circuits
plural input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14815480A
Other languages
Japanese (ja)
Inventor
Akira Kawada
Kanji Tawara
Harutoshi Kameda
Kaoru Tokunaga
Kakio Katsuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP14815480A priority Critical patent/JPS5773590A/en
Publication of JPS5773590A publication Critical patent/JPS5773590A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To reduce the number of control informaton receiving circuits and simplifying an interface circuit with a central processing unit by using the control information receiving circuits in common to plural input call highways. CONSTITUTION:Plural input call highways 1 including a few time slots in a frame are multiplexed with output call highways 3 with many time slots in a frame and control information receiving circuits R are connected to the output call highways 3 to use the control information receiving circuits R in common to plural input call highways 1. In order to multiplex plural input call highways 1 with the output call highways 3, a series/parallel converter SP, a latch L and a multiplexer MPX are installed.
JP14815480A 1980-10-24 1980-10-24 Receiving system for time sharing channel control information Pending JPS5773590A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14815480A JPS5773590A (en) 1980-10-24 1980-10-24 Receiving system for time sharing channel control information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14815480A JPS5773590A (en) 1980-10-24 1980-10-24 Receiving system for time sharing channel control information

Publications (1)

Publication Number Publication Date
JPS5773590A true JPS5773590A (en) 1982-05-08

Family

ID=15446461

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14815480A Pending JPS5773590A (en) 1980-10-24 1980-10-24 Receiving system for time sharing channel control information

Country Status (1)

Country Link
JP (1) JPS5773590A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6167398A (en) * 1984-09-11 1986-04-07 Kokusai Denshin Denwa Co Ltd <Kdd> Optical fiber signal branch transmission system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54100607A (en) * 1978-01-25 1979-08-08 Fujitsu Ltd Circuit common-control system of time-division digital telephone switchboard

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54100607A (en) * 1978-01-25 1979-08-08 Fujitsu Ltd Circuit common-control system of time-division digital telephone switchboard

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6167398A (en) * 1984-09-11 1986-04-07 Kokusai Denshin Denwa Co Ltd <Kdd> Optical fiber signal branch transmission system

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