JPS5772348A - Wiring structure in integrated circuit - Google Patents

Wiring structure in integrated circuit

Info

Publication number
JPS5772348A
JPS5772348A JP14978280A JP14978280A JPS5772348A JP S5772348 A JPS5772348 A JP S5772348A JP 14978280 A JP14978280 A JP 14978280A JP 14978280 A JP14978280 A JP 14978280A JP S5772348 A JPS5772348 A JP S5772348A
Authority
JP
Japan
Prior art keywords
pattern
points
wiring
axis
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14978280A
Other languages
English (en)
Inventor
Hitoshi Yoshizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14978280A priority Critical patent/JPS5772348A/ja
Publication of JPS5772348A publication Critical patent/JPS5772348A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP14978280A 1980-10-24 1980-10-24 Wiring structure in integrated circuit Pending JPS5772348A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14978280A JPS5772348A (en) 1980-10-24 1980-10-24 Wiring structure in integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14978280A JPS5772348A (en) 1980-10-24 1980-10-24 Wiring structure in integrated circuit

Publications (1)

Publication Number Publication Date
JPS5772348A true JPS5772348A (en) 1982-05-06

Family

ID=15482593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14978280A Pending JPS5772348A (en) 1980-10-24 1980-10-24 Wiring structure in integrated circuit

Country Status (1)

Country Link
JP (1) JPS5772348A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4941031A (en) * 1988-11-16 1990-07-10 Kabushiki Kaisha Toshiba Dynamic memory device with improved wiring layer layout
DE3546817C2 (de) * 1984-04-28 1996-05-23 Canon Kk Bindemittelharz für einen Toner und dessen Verwendung

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3546817C2 (de) * 1984-04-28 1996-05-23 Canon Kk Bindemittelharz für einen Toner und dessen Verwendung
US4941031A (en) * 1988-11-16 1990-07-10 Kabushiki Kaisha Toshiba Dynamic memory device with improved wiring layer layout

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