JPS5769764A - Connecting structure of fet - Google Patents
Connecting structure of fetInfo
- Publication number
- JPS5769764A JPS5769764A JP55144372A JP14437280A JPS5769764A JP S5769764 A JPS5769764 A JP S5769764A JP 55144372 A JP55144372 A JP 55144372A JP 14437280 A JP14437280 A JP 14437280A JP S5769764 A JPS5769764 A JP S5769764A
- Authority
- JP
- Japan
- Prior art keywords
- fet
- conductor
- metal plate
- slit
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Waveguide Connection Structure (AREA)
- Microwave Amplifiers (AREA)
- Wire Bonding (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
PURPOSE:To earth a source electrode of FET with simple constituion and to constitute as not to generate damage of the FET by a method wherein a conductor on the back of a metal plate and the source metal face of the FET are connected using the metal plate being formed a cross type slit therein. CONSTITUTION:The cross type slit 15 is provided at the center of the metal plate 14, and a square to be formed by connecting the tops of the slit 15 is made as to have size being insertable the FET1 therein. Pedestal type parts formed between the slit 15 are bent rectangularly to form ratches 16, the source metal face 8 is fixed therein as to protrude on the conductor 11 side on the back, the flange part 19 of the metal plate 14 and the conductor 11 on the back are soldered with a solder 17, and the ratches 16 and the metal face 8 are soldered with the solder 13. Accordingly the source electrode 6 can be earthed with short lead length, and damage of the FET to be caused by flowing of the solder in e gap 12 generating short-circuit between the conductor 11 on the back and a gate electrode 5 or a drain electrode 6 is not generated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55144372A JPS5769764A (en) | 1980-10-17 | 1980-10-17 | Connecting structure of fet |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55144372A JPS5769764A (en) | 1980-10-17 | 1980-10-17 | Connecting structure of fet |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5769764A true JPS5769764A (en) | 1982-04-28 |
JPS6318881B2 JPS6318881B2 (en) | 1988-04-20 |
Family
ID=15360580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55144372A Granted JPS5769764A (en) | 1980-10-17 | 1980-10-17 | Connecting structure of fet |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5769764A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58135114U (en) * | 1982-03-08 | 1983-09-10 | 株式会社東芝 | microwave fet amplifier |
JPS59224148A (en) * | 1983-06-02 | 1984-12-17 | Sumitomo Electric Ind Ltd | Package for semiconductor element |
JPS6049675A (en) * | 1983-08-29 | 1985-03-18 | Fujitsu Ltd | Semiconductor device |
EP2911487A1 (en) * | 2014-02-21 | 2015-08-26 | Autoliv Development AB | Circuit board mounting arrangement |
-
1980
- 1980-10-17 JP JP55144372A patent/JPS5769764A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58135114U (en) * | 1982-03-08 | 1983-09-10 | 株式会社東芝 | microwave fet amplifier |
JPS59224148A (en) * | 1983-06-02 | 1984-12-17 | Sumitomo Electric Ind Ltd | Package for semiconductor element |
JPS6049675A (en) * | 1983-08-29 | 1985-03-18 | Fujitsu Ltd | Semiconductor device |
EP2911487A1 (en) * | 2014-02-21 | 2015-08-26 | Autoliv Development AB | Circuit board mounting arrangement |
Also Published As
Publication number | Publication date |
---|---|
JPS6318881B2 (en) | 1988-04-20 |
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