JPS5769342A - Electronic equipment - Google Patents

Electronic equipment

Info

Publication number
JPS5769342A
JPS5769342A JP55141739A JP14173980A JPS5769342A JP S5769342 A JPS5769342 A JP S5769342A JP 55141739 A JP55141739 A JP 55141739A JP 14173980 A JP14173980 A JP 14173980A JP S5769342 A JPS5769342 A JP S5769342A
Authority
JP
Japan
Prior art keywords
rom1
address designation
circuits
outputs
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55141739A
Other languages
Japanese (ja)
Other versions
JPH026096B2 (en
Inventor
Itsuo Sasaki
Hiroaki Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55141739A priority Critical patent/JPS5769342A/en
Publication of JPS5769342A publication Critical patent/JPS5769342A/en
Publication of JPH026096B2 publication Critical patent/JPH026096B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/226—Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Calculators And Similar Devices (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To prevent the complicated constitution of a circuit due to an alteration of designing, caused by the increase of frequency of a nonvolatile memory, and the reduction of margin, etc., and to continuouly access a volatile memory by outputting an address designation signal having a number of bits corresponding to one or more units of volatile memory. CONSTITUTION:A control program is stored in a nonvolatile ROM1, and an input data is stored in a volatile ROM13 according to the designation of the ROM1. The program fed from the ROM1 is applied to a random logic 3 via a decoder 2 to deliver address designation data S1-S4 having a larger number of bits than the number of bits corresponding to the ROM13 and in accordance with the signal supplied form the logic 3. At the same time, the address designation data given from the ROM1 is applied to address designating circuits 51-53 having a smaller number of outputs than the number of pieces of address designation. The outputs of the circuits 51-53 are applied to selecting circuits 61 and 62 which use address designation data S1, S2, S3 and S4 as the inputs. Then the outputs selected by the circuits 61 and 62 are supplied to an RAM13 via row and column decoders 11 and 12 respectively.
JP55141739A 1980-10-09 1980-10-09 Electronic equipment Granted JPS5769342A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55141739A JPS5769342A (en) 1980-10-09 1980-10-09 Electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55141739A JPS5769342A (en) 1980-10-09 1980-10-09 Electronic equipment

Publications (2)

Publication Number Publication Date
JPS5769342A true JPS5769342A (en) 1982-04-28
JPH026096B2 JPH026096B2 (en) 1990-02-07

Family

ID=15299071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55141739A Granted JPS5769342A (en) 1980-10-09 1980-10-09 Electronic equipment

Country Status (1)

Country Link
JP (1) JPS5769342A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5352322A (en) * 1976-10-25 1978-05-12 Toshiba Corp Memory unit
JPS5418636A (en) * 1977-07-13 1979-02-10 Toshiba Corp Address selection circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5352322A (en) * 1976-10-25 1978-05-12 Toshiba Corp Memory unit
JPS5418636A (en) * 1977-07-13 1979-02-10 Toshiba Corp Address selection circuit

Also Published As

Publication number Publication date
JPH026096B2 (en) 1990-02-07

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