JPS5768092A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS5768092A JPS5768092A JP14290080A JP14290080A JPS5768092A JP S5768092 A JPS5768092 A JP S5768092A JP 14290080 A JP14290080 A JP 14290080A JP 14290080 A JP14290080 A JP 14290080A JP S5768092 A JPS5768092 A JP S5768092A
- Authority
- JP
- Japan
- Prior art keywords
- film
- line
- bit line
- gate
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 239000010408 film Substances 0.000 abstract 5
- 230000005294 ferromagnetic effect Effects 0.000 abstract 3
- 239000004020 conductor Substances 0.000 abstract 2
- 230000005415 magnetization Effects 0.000 abstract 2
- 239000010409 thin film Substances 0.000 abstract 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 229920005591 polysilicon Polymers 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 229910000859 α-Fe Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/82—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of the magnetic field applied to the device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Hall/Mr Elements (AREA)
- Non-Volatile Memory (AREA)
- Mram Or Spin Memory Techniques (AREA)
Abstract
PURPOSE:To obtain a high speed non-volatile memory by superposing ferromagnetic thin film on the gate (or under the gate) of an MOFET and connecting a metallic wire thereto. CONSTITUTION:An MOSFETQ2 is formed on a p type Si substrate, a ferrite thin film 6 is superposed via an insulating film 5 on a polysilicon gate 4, and aluminum conductor 8 for magnetization is disposed through an insulating film 7. At the writing time a writing line W and bit line A are set to ''H'', the conductor 8 is energized from A to B to magnetize film 6. At the reading time a reading line R and the bit line A are set to ''H'', and the magnitude of the drain current ID of the Q2 is detected and amplified. At the erasing time the writing line W and bit line B are set to ''H'', is energized reversely from B to A to demagnetize the ferromagnetic film. With this structure, the channel current of the Q2 is controlled by the existence or absence of magnetization of the ferromagnetic film, thereby obtaining high speed non-volatile memory having no variation in memory even if the power source is disconnected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14290080A JPS5768092A (en) | 1980-10-15 | 1980-10-15 | Semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14290080A JPS5768092A (en) | 1980-10-15 | 1980-10-15 | Semiconductor memory device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5768092A true JPS5768092A (en) | 1982-04-26 |
Family
ID=15326205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14290080A Pending JPS5768092A (en) | 1980-10-15 | 1980-10-15 | Semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5768092A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0111698A2 (en) * | 1982-11-22 | 1984-06-27 | LGZ LANDIS & GYR ZUG AG | Magnetic-field sensor |
| US4831427A (en) * | 1987-07-23 | 1989-05-16 | Texas Instruments Incorporated | Ferromagnetic gate memory |
| EP0319427A2 (en) * | 1987-12-02 | 1989-06-07 | Sumitomo Electric Industries Limited | Nonvolatile memory element |
| WO2004088754A1 (en) * | 2003-03-31 | 2004-10-14 | Matsushita Electric Industrial Co., Ltd. | Memory cell, memory using the memory cell, memory cell manufacturing method, and memory recording/reading method |
-
1980
- 1980-10-15 JP JP14290080A patent/JPS5768092A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0111698A2 (en) * | 1982-11-22 | 1984-06-27 | LGZ LANDIS & GYR ZUG AG | Magnetic-field sensor |
| US4831427A (en) * | 1987-07-23 | 1989-05-16 | Texas Instruments Incorporated | Ferromagnetic gate memory |
| EP0319427A2 (en) * | 1987-12-02 | 1989-06-07 | Sumitomo Electric Industries Limited | Nonvolatile memory element |
| WO2004088754A1 (en) * | 2003-03-31 | 2004-10-14 | Matsushita Electric Industrial Co., Ltd. | Memory cell, memory using the memory cell, memory cell manufacturing method, and memory recording/reading method |
| US7436697B2 (en) | 2003-03-31 | 2008-10-14 | Matsushita Electric Industrial Co., Ltd. | Memory cell, memory using the memory cell, memory cell manufacturing method, and memory recording/reading method |
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