JPS5768034A - Dry etching method for amorphous hydrogenated silicon - Google Patents

Dry etching method for amorphous hydrogenated silicon

Info

Publication number
JPS5768034A
JPS5768034A JP55144796A JP14479680A JPS5768034A JP S5768034 A JPS5768034 A JP S5768034A JP 55144796 A JP55144796 A JP 55144796A JP 14479680 A JP14479680 A JP 14479680A JP S5768034 A JPS5768034 A JP S5768034A
Authority
JP
Japan
Prior art keywords
gas
hydrogenated silicon
amorphous hydrogenated
dry etching
tube
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55144796A
Other languages
Japanese (ja)
Other versions
JPS6349896B2 (en
Inventor
Masao Sugata
Yoshiyuki Osada
Katsunori Hatanaka
Yukitoshi Okubo
Takashi Nakagiri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP55144796A priority Critical patent/JPS5768034A/en
Publication of JPS5768034A publication Critical patent/JPS5768034A/en
Publication of JPS6349896B2 publication Critical patent/JPS6349896B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Abstract

PURPOSE:To enable the etching of only a film of amorphous hydrogenated silicon without damaging a glass or the like used as a substrate by dry etching the film in a mixture gas of tetrafluorocarbon and hydrogen gas when the film is dry etched. CONSTITUTION:An anode electrode 12 and a water-cooled cathode electrode 13 are faced while enabling the adjustment of the interval between the electrodes 12 and 13 within a dry etching chamber 11, and an annular gas guide tube 16 provided with many gas flowing holes toward the inside is provided therebetween. The arrangement is thus composed, a target 14, e.g., a glass plate or the like having amorphous hydrogenated silicon on the surface is placed on the electrode 13, and tetrafluoro-carbon gas containing 2-40vol% of hydrogen gas is fed from the inlet of the tube 16. Subsequently, the mixture gas is sprayed from the gas flow hole of the tube 16 to the exposed region of the amorphous hydrogenated silicon coating with resist pattern to etch it as desired, and the gas is discharged from the discharge tube 15.
JP55144796A 1980-10-16 1980-10-16 Dry etching method for amorphous hydrogenated silicon Granted JPS5768034A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55144796A JPS5768034A (en) 1980-10-16 1980-10-16 Dry etching method for amorphous hydrogenated silicon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55144796A JPS5768034A (en) 1980-10-16 1980-10-16 Dry etching method for amorphous hydrogenated silicon

Publications (2)

Publication Number Publication Date
JPS5768034A true JPS5768034A (en) 1982-04-26
JPS6349896B2 JPS6349896B2 (en) 1988-10-06

Family

ID=15370650

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55144796A Granted JPS5768034A (en) 1980-10-16 1980-10-16 Dry etching method for amorphous hydrogenated silicon

Country Status (1)

Country Link
JP (1) JPS5768034A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63151024A (en) * 1986-12-16 1988-06-23 Semiconductor Energy Lab Co Ltd Etching method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63151024A (en) * 1986-12-16 1988-06-23 Semiconductor Energy Lab Co Ltd Etching method

Also Published As

Publication number Publication date
JPS6349896B2 (en) 1988-10-06

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