JPS576373A - Setting and testing device - Google Patents

Setting and testing device

Info

Publication number
JPS576373A
JPS576373A JP8002980A JP8002980A JPS576373A JP S576373 A JPS576373 A JP S576373A JP 8002980 A JP8002980 A JP 8002980A JP 8002980 A JP8002980 A JP 8002980A JP S576373 A JPS576373 A JP S576373A
Authority
JP
Japan
Prior art keywords
setting
tests
tested
normal
results
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8002980A
Other languages
Japanese (ja)
Inventor
Masaaki Nagatake
Akio Furuya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8002980A priority Critical patent/JPS576373A/en
Publication of JPS576373A publication Critical patent/JPS576373A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2834—Automated test systems [ATE]; using microprocessors or computers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To carry out tests accurately at a high speed by automatically performing input setting to the next state when the results of the tests in the parts to be tested are normal. CONSTITUTION:In the figure, 2 is a circuit to be tested haing setting terminals 1, 3 is a means for automatic setting of specific conditions, 4 is an input means for the results of tests, and 5 is a means of monitoring, controlling and deciding the means 3 and 4. All the combinations of the setting conditions to the test circuit are beforehand stored in the means 5 and according to the sequence thereof, the relay contacts in the means 3 are automatically operated, whereby the terminals 1 are set. The output states and setting conditions of the circuit to be tested are inputted through the means 4 to the means 5, by which decision is made. When the result is normal, the setting of inputs is changed to the next state automatically, and if abnormal, it is announced by such a method as sounding a buzzer. If the results are normal, the setting conditions are instantaneously switched to the next state in this way, and therefore, the tests are carried out accurately at a high speed.
JP8002980A 1980-06-13 1980-06-13 Setting and testing device Pending JPS576373A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8002980A JPS576373A (en) 1980-06-13 1980-06-13 Setting and testing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8002980A JPS576373A (en) 1980-06-13 1980-06-13 Setting and testing device

Publications (1)

Publication Number Publication Date
JPS576373A true JPS576373A (en) 1982-01-13

Family

ID=13706839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8002980A Pending JPS576373A (en) 1980-06-13 1980-06-13 Setting and testing device

Country Status (1)

Country Link
JP (1) JPS576373A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04117560U (en) * 1991-04-05 1992-10-21 積水化成品工業株式会社 Planting panel for hydroponic cultivation
EP1584933A1 (en) * 2004-04-02 2005-10-12 ATMEL Germany GmbH Method and device for testing of integrated circuits
US8344580B2 (en) 2006-03-31 2013-01-01 Robert Bosch Gmbh Stator for a polyphase electric machine and method for manufacturing same
WO2018143377A1 (en) * 2017-02-02 2018-08-09 株式会社デンソー Dynamo-electric machine

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04117560U (en) * 1991-04-05 1992-10-21 積水化成品工業株式会社 Planting panel for hydroponic cultivation
EP1584933A1 (en) * 2004-04-02 2005-10-12 ATMEL Germany GmbH Method and device for testing of integrated circuits
US8344580B2 (en) 2006-03-31 2013-01-01 Robert Bosch Gmbh Stator for a polyphase electric machine and method for manufacturing same
WO2018143377A1 (en) * 2017-02-02 2018-08-09 株式会社デンソー Dynamo-electric machine

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