JPS5690650A - Method and device for loop back control over pcm transmission line - Google Patents

Method and device for loop back control over pcm transmission line

Info

Publication number
JPS5690650A
JPS5690650A JP16761679A JP16761679A JPS5690650A JP S5690650 A JPS5690650 A JP S5690650A JP 16761679 A JP16761679 A JP 16761679A JP 16761679 A JP16761679 A JP 16761679A JP S5690650 A JPS5690650 A JP S5690650A
Authority
JP
Japan
Prior art keywords
loop back
transmission line
circuit
output
control over
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16761679A
Other languages
Japanese (ja)
Other versions
JPS5837744B2 (en
Inventor
Hajime Kakehi
Keisuke Hoshino
Yoshiaki Kono
Hiroshi Takizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16761679A priority Critical patent/JPS5837744B2/en
Publication of JPS5690650A publication Critical patent/JPS5690650A/en
Publication of JPS5837744B2 publication Critical patent/JPS5837744B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/40—Monitoring; Testing of relay systems

Abstract

PURPOSE:To shorten the recovery time at the time of fault, by automatically performing loop back operation through operation from a central terminal office. CONSTITUTION:If a fault occurs on a transmission line, loop test switch 62 of central terminal office 32 is operated to change its moving contacts over to side N/E and TST. Assuming that in-use circuit 34 between loop control units 44-1 and 44-2 is cut, current detector 54-1 is not in operation and detection output S4 stays at a low level. Therefore, FF80 is not set and the output of AND gate 86 is at a high level; and a clock pulse is applied from timer 90 after the prescribed time, so that the output of FF reachs the high level. As a result, driving circuit 58b is energized to close loop back switch 58a, so that in-use circuit 34 and stand by circuit 36 are connected together electrically.
JP16761679A 1979-12-25 1979-12-25 Loopback control method and device in PCM transmission line Expired JPS5837744B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16761679A JPS5837744B2 (en) 1979-12-25 1979-12-25 Loopback control method and device in PCM transmission line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16761679A JPS5837744B2 (en) 1979-12-25 1979-12-25 Loopback control method and device in PCM transmission line

Publications (2)

Publication Number Publication Date
JPS5690650A true JPS5690650A (en) 1981-07-22
JPS5837744B2 JPS5837744B2 (en) 1983-08-18

Family

ID=15853079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16761679A Expired JPS5837744B2 (en) 1979-12-25 1979-12-25 Loopback control method and device in PCM transmission line

Country Status (1)

Country Link
JP (1) JPS5837744B2 (en)

Also Published As

Publication number Publication date
JPS5837744B2 (en) 1983-08-18

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