JPS5760664B2 - - Google Patents

Info

Publication number
JPS5760664B2
JPS5760664B2 JP51135053A JP13505376A JPS5760664B2 JP S5760664 B2 JPS5760664 B2 JP S5760664B2 JP 51135053 A JP51135053 A JP 51135053A JP 13505376 A JP13505376 A JP 13505376A JP S5760664 B2 JPS5760664 B2 JP S5760664B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51135053A
Other languages
Japanese (ja)
Other versions
JPS5373927A (en
Inventor
Akira Hatsutori
Takamitsu Tsuchimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP13505376A priority Critical patent/JPS5373927A/ja
Priority to US05/846,427 priority patent/US4181937A/en
Priority to FR7733572A priority patent/FR2371019A1/fr
Priority to GB4670277A priority patent/GB1557495A/en
Priority to DE19772750126 priority patent/DE2750126C3/de
Publication of JPS5373927A publication Critical patent/JPS5373927A/ja
Publication of JPS5760664B2 publication Critical patent/JPS5760664B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
JP13505376A 1976-11-10 1976-11-10 Replacing system of intermediate buffer memory Granted JPS5373927A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP13505376A JPS5373927A (en) 1976-11-10 1976-11-10 Replacing system of intermediate buffer memory
US05/846,427 US4181937A (en) 1976-11-10 1977-10-28 Data processing system having an intermediate buffer memory
FR7733572A FR2371019A1 (fr) 1976-11-10 1977-11-08 Procede de remplacement des blocs de donnees dans une memoire tampon intermediaire
GB4670277A GB1557495A (en) 1976-11-10 1977-11-09 Data processing system
DE19772750126 DE2750126C3 (de) 1976-11-10 1977-11-09 Datenverarbeitungssystem mit einem Zwischenpufferspeicher

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13505376A JPS5373927A (en) 1976-11-10 1976-11-10 Replacing system of intermediate buffer memory

Publications (2)

Publication Number Publication Date
JPS5373927A JPS5373927A (en) 1978-06-30
JPS5760664B2 true JPS5760664B2 (fi) 1982-12-21

Family

ID=15142809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13505376A Granted JPS5373927A (en) 1976-11-10 1976-11-10 Replacing system of intermediate buffer memory

Country Status (4)

Country Link
JP (1) JPS5373927A (fi)
DE (1) DE2750126C3 (fi)
FR (1) FR2371019A1 (fi)
GB (1) GB1557495A (fi)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4445174A (en) * 1981-03-31 1984-04-24 International Business Machines Corporation Multiprocessing system including a shared cache
US4463420A (en) * 1982-02-23 1984-07-31 International Business Machines Corporation Multiprocessor cache replacement under task control
CA2047888A1 (en) * 1990-07-27 1992-01-28 Hirosada Tone Hierarchical memory control system
US7024519B2 (en) 2002-05-06 2006-04-04 Sony Computer Entertainment Inc. Methods and apparatus for controlling hierarchical cache memory
US7577793B2 (en) * 2006-01-19 2009-08-18 International Business Machines Corporation Patrol snooping for higher level cache eviction candidate identification
JP2008046902A (ja) * 2006-08-17 2008-02-28 Fujitsu Ltd 情報処理システム、情報処理基板、及びキャッシュタグ及びスヌープタグの更新方法
JP5404433B2 (ja) * 2010-01-08 2014-01-29 株式会社東芝 マルチコアシステム

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3947823A (en) * 1973-12-26 1976-03-30 International Business Machines Corp. Means for coordinating asynchronous main store accesses in a multiprocessing system using virtual storage

Also Published As

Publication number Publication date
JPS5373927A (en) 1978-06-30
DE2750126A1 (de) 1978-05-11
DE2750126B2 (fi) 1979-04-26
GB1557495A (en) 1979-12-12
DE2750126C3 (de) 1979-12-20
FR2371019B1 (fi) 1982-05-07
FR2371019A1 (fr) 1978-06-09

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